2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/pirq_routing.h>
16 #include <asm/tables.h>
18 DECLARE_GLOBAL_DATA_PTR;
20 static struct irq_routing_table *pirq_routing_table;
22 bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)
24 struct irq_router *priv = dev_get_priv(dev);
26 int base = priv->link_base;
28 if (priv->config == PIRQ_VIA_PCI)
29 dm_pci_read_config8(dev->parent, LINK_N2V(link, base), &pirq);
31 pirq = readb(priv->ibase + LINK_N2V(link, base));
35 /* IRQ# 0/1/2/8/13 are reserved */
36 if (pirq < 3 || pirq == 8 || pirq == 13)
39 return pirq == irq ? true : false;
42 int pirq_translate_link(struct udevice *dev, int link)
44 struct irq_router *priv = dev_get_priv(dev);
46 return LINK_V2N(link, priv->link_base);
49 void pirq_assign_irq(struct udevice *dev, int link, u8 irq)
51 struct irq_router *priv = dev_get_priv(dev);
52 int base = priv->link_base;
54 /* IRQ# 0/1/2/8/13 are reserved */
55 if (irq < 3 || irq == 8 || irq == 13)
58 if (priv->config == PIRQ_VIA_PCI)
59 dm_pci_write_config8(dev->parent, LINK_N2V(link, base), irq);
61 writeb(irq, priv->ibase + LINK_N2V(link, base));
64 static struct irq_info *check_dup_entry(struct irq_info *slot_base,
65 int entry_num, int bus, int device)
67 struct irq_info *slot = slot_base;
70 for (i = 0; i < entry_num; i++) {
71 if (slot->bus == bus && slot->devfn == (device << 3))
76 return (i == entry_num) ? NULL : slot;
79 static inline void fill_irq_info(struct irq_router *priv, struct irq_info *slot,
80 int bus, int device, int pin, int pirq)
83 slot->devfn = (device << 3) | 0;
84 slot->irq[pin - 1].link = LINK_N2V(pirq, priv->link_base);
85 slot->irq[pin - 1].bitmap = priv->irq_mask;
88 static int create_pirq_routing_table(struct udevice *dev)
90 struct irq_router *priv = dev_get_priv(dev);
91 const void *blob = gd->fdt_blob;
95 struct irq_routing_table *rt;
96 struct irq_info *slot, *slot_base;
101 node = dev->of_offset;
103 /* extract the bdf from fdt_pci_addr */
104 priv->bdf = dm_pci_get_bdf(dev->parent);
106 ret = fdt_find_string(blob, node, "intel,pirq-config", "pci");
108 priv->config = PIRQ_VIA_PCI;
110 ret = fdt_find_string(blob, node, "intel,pirq-config", "ibase");
112 priv->config = PIRQ_VIA_IBASE;
117 ret = fdtdec_get_int(blob, node, "intel,pirq-link", -1);
120 priv->link_base = ret;
122 priv->irq_mask = fdtdec_get_int(blob, node,
123 "intel,pirq-mask", PIRQ_BITMAP);
125 if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) {
126 /* Reserve IRQ9 for SCI */
127 priv->irq_mask &= ~(1 << 9);
130 if (priv->config == PIRQ_VIA_IBASE) {
133 ibase_off = fdtdec_get_int(blob, node, "intel,ibase-offset", 0);
138 * Here we assume that the IBASE register has already been
139 * properly configured by U-Boot before.
141 * By 'valid' we mean:
142 * 1) a valid memory space carved within system memory space
143 * assigned to IBASE register block.
144 * 2) memory range decoding is enabled.
145 * Hence we don't do any santify test here.
147 dm_pci_read_config32(dev->parent, ibase_off, &priv->ibase);
151 priv->actl_8bit = fdtdec_get_bool(blob, node, "intel,actl-8bit");
152 priv->actl_addr = fdtdec_get_int(blob, node, "intel,actl-addr", 0);
154 cell = fdt_getprop(blob, node, "intel,pirq-routing", &len);
155 if (!cell || len % sizeof(struct pirq_routing))
157 count = len / sizeof(struct pirq_routing);
159 rt = calloc(1, sizeof(struct irq_routing_table));
163 /* Populate the PIRQ table fields */
164 rt->signature = PIRQ_SIGNATURE;
165 rt->version = PIRQ_VERSION;
166 rt->rtr_bus = PCI_BUS(priv->bdf);
167 rt->rtr_devfn = (PCI_DEV(priv->bdf) << 3) | PCI_FUNC(priv->bdf);
168 rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
169 rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
171 slot_base = rt->slots;
173 /* Now fill in the irq_info entries in the PIRQ table */
174 for (i = 0; i < count;
175 i++, cell += sizeof(struct pirq_routing) / sizeof(u32)) {
176 struct pirq_routing pr;
178 pr.bdf = fdt_addr_to_cpu(cell[0]);
179 pr.pin = fdt_addr_to_cpu(cell[1]);
180 pr.pirq = fdt_addr_to_cpu(cell[2]);
182 debug("irq_info %d: b.d.f %x.%x.%x INT%c PIRQ%c\n",
183 i, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
184 PCI_FUNC(pr.bdf), 'A' + pr.pin - 1,
187 slot = check_dup_entry(slot_base, irq_entries,
188 PCI_BUS(pr.bdf), PCI_DEV(pr.bdf));
190 debug("found entry for bus %d device %d, ",
191 PCI_BUS(pr.bdf), PCI_DEV(pr.bdf));
193 if (slot->irq[pr.pin - 1].link) {
197 * Sanity test on the routed PIRQ pin
199 * If they don't match, show a warning to tell
200 * there might be something wrong with the PIRQ
201 * routing information in the device tree.
203 if (slot->irq[pr.pin - 1].link !=
204 LINK_N2V(pr.pirq, priv->link_base))
205 debug("WARNING: Inconsistent PIRQ routing information\n");
209 slot = slot_base + irq_entries++;
211 debug("writing INT%c\n", 'A' + pr.pin - 1);
212 fill_irq_info(priv, slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
216 rt->size = irq_entries * sizeof(struct irq_info) + 32;
218 /* Fix up the table checksum */
219 rt->checksum = table_compute_checksum(rt, rt->size);
221 pirq_routing_table = rt;
226 static void irq_enable_sci(struct udevice *dev)
228 struct irq_router *priv = dev_get_priv(dev);
230 if (priv->actl_8bit) {
231 /* Bit7 must be turned on to enable ACPI */
232 dm_pci_write_config8(dev->parent, priv->actl_addr, 0x80);
234 /* Write 0 to enable SCI on IRQ9 */
235 if (priv->config == PIRQ_VIA_PCI)
236 dm_pci_write_config32(dev->parent, priv->actl_addr, 0);
238 writel(0, priv->ibase + priv->actl_addr);
242 int irq_router_common_init(struct udevice *dev)
246 ret = create_pirq_routing_table(dev);
248 debug("Failed to create pirq routing table\n");
252 pirq_route_irqs(dev, pirq_routing_table->slots,
253 get_irq_slot_count(pirq_routing_table));
255 if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE))
261 int irq_router_probe(struct udevice *dev)
263 return irq_router_common_init(dev);
266 u32 write_pirq_routing_table(u32 addr)
268 if (!pirq_routing_table)
271 return copy_pirq_routing_table(addr, pirq_routing_table);
274 static const struct udevice_id irq_router_ids[] = {
275 { .compatible = "intel,irq-router" },
279 U_BOOT_DRIVER(irq_router_drv) = {
282 .of_match = irq_router_ids,
283 .probe = irq_router_probe,
284 .priv_auto_alloc_size = sizeof(struct irq_router),
287 UCLASS_DRIVER(irq) = {