2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2008,2009
4 * Graeme Russ, <graeme.russ@gmail.com>
7 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 static struct pci_controller coreboot_hose;
34 static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev,
35 struct pci_config_table *table)
38 hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
39 hose->last_busno = max(hose->last_busno, secondary);
40 pci_hose_scan_bus(hose, secondary);
43 static struct pci_config_table pci_coreboot_config_table[] = {
44 /* vendor, device, class, bus, dev, func */
45 { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI,
46 PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, &config_pci_bridge },
50 void pci_init_board(void)
52 coreboot_hose.config_table = pci_coreboot_config_table;
53 coreboot_hose.first_busno = 0;
54 coreboot_hose.last_busno = 0;
56 pci_set_region(coreboot_hose.regions + 0, 0x0, 0x0, 0xffffffff,
58 coreboot_hose.region_count = 1;
60 pci_setup_type1(&coreboot_hose);
62 pci_register_hose(&coreboot_hose);
64 pci_hose_scan(&coreboot_hose);