1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
5 * Graeme Russ, graeme.russ@gmail.com.
15 #include <asm/arch/sysinfo.h>
16 #include <asm/arch/timestamp.h>
18 DECLARE_GLOBAL_DATA_PTR;
20 int arch_cpu_init(void)
22 int ret = get_coreboot_info(&lib_sysinfo);
24 printf("Failed to parse coreboot tables.\n");
30 return x86_cpu_init_f();
38 int print_cpuinfo(void)
40 return default_print_cpuinfo();
43 static void board_final_cleanup(void)
46 * Un-cache the ROM so the kernel has one
47 * more MTRR available.
49 * Coreboot should have assigned this to the
50 * top available variable MTRR.
52 u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1;
53 u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff;
55 /* Make sure this MTRR is the correct Write-Protected type */
56 if (top_type == MTRR_TYPE_WRPROT) {
57 struct mtrr_state state;
59 mtrr_open(&state, true);
60 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0);
61 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0);
62 mtrr_close(&state, true);
65 if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
67 * Issue SMI to coreboot to lock down ME and registers
68 * when allowed via device tree
70 printf("Finalizing coreboot\n");
75 int last_stage_init(void)
77 /* start usb so that usb keyboard can be used as input device */
78 if (CONFIG_IS_ENABLED(USB_KEYBOARD))
81 board_final_cleanup();