1 menu "x86 architecture"
7 config USE_PRIVATE_LIBGCC
11 prompt "Target select"
13 config TARGET_COREBOOT
14 bool "Support coreboot"
16 This target is used for running U-Boot on top of Coreboot. In
17 this case Coreboot does the early inititalisation, and U-Boot
18 takes over once the RAM, video and CPU are fully running.
19 U-Boot is loaded as a fallback payload from Coreboot, in
20 Coreboot terminology. This method was used for the Chromebook
23 config TARGET_CHROMEBOOK_LINK
24 bool "Support Chromebook link"
26 This is the Chromebook Pixel released in 2013. It uses an Intel
27 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
28 SDRAM. It has a Panther Point platform controller hub, PCIe
29 WiFi and Bluetooth. It also includes a 720p webcam, USB SD
30 reader, microphone and speakers, display port and 32GB SATA
31 solid state drive. There is a Chrome OS EC connected on LPC,
32 and it provides a 2560x1700 high resolution touch-enabled LCD
35 config TARGET_CROWNBAY
36 bool "Support Intel Crown Bay CRB"
38 This is the Intel Crown Bay Customer Reference Board. It contains
39 the Intel Atom Processor E6xx populated on the COM Express module
40 with 1GB DDR2 soldered down memory and a carrier board with the
41 Intel Platform Controller Hub EG20T, other system components and
42 peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
60 default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
69 config BOARD_ROMSIZE_KB_512
71 config BOARD_ROMSIZE_KB_1024
73 config BOARD_ROMSIZE_KB_2048
75 config BOARD_ROMSIZE_KB_4096
77 config BOARD_ROMSIZE_KB_8192
79 config BOARD_ROMSIZE_KB_16384
83 prompt "ROM chip size"
84 default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
85 default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
86 default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
87 default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
88 default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
89 default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
91 Select the size of the ROM chip you intend to flash U-Boot on.
93 The build system will take care of creating a u-boot.rom file
96 config UBOOT_ROMSIZE_KB_512
99 Choose this option if you have a 512 KB ROM chip.
101 config UBOOT_ROMSIZE_KB_1024
102 bool "1024 KB (1 MB)"
104 Choose this option if you have a 1024 KB (1 MB) ROM chip.
106 config UBOOT_ROMSIZE_KB_2048
107 bool "2048 KB (2 MB)"
109 Choose this option if you have a 2048 KB (2 MB) ROM chip.
111 config UBOOT_ROMSIZE_KB_4096
112 bool "4096 KB (4 MB)"
114 Choose this option if you have a 4096 KB (4 MB) ROM chip.
116 config UBOOT_ROMSIZE_KB_8192
117 bool "8192 KB (8 MB)"
119 Choose this option if you have a 8192 KB (8 MB) ROM chip.
121 config UBOOT_ROMSIZE_KB_16384
122 bool "16384 KB (16 MB)"
124 Choose this option if you have a 16384 KB (16 MB) ROM chip.
128 # Map the config names to an integer (KB).
129 config UBOOT_ROMSIZE_KB
131 default 512 if UBOOT_ROMSIZE_KB_512
132 default 1024 if UBOOT_ROMSIZE_KB_1024
133 default 2048 if UBOOT_ROMSIZE_KB_2048
134 default 4096 if UBOOT_ROMSIZE_KB_4096
135 default 8192 if UBOOT_ROMSIZE_KB_8192
136 default 16384 if UBOOT_ROMSIZE_KB_16384
138 # Map the config names to a hex value (bytes).
141 default 0x80000 if UBOOT_ROMSIZE_KB_512
142 default 0x100000 if UBOOT_ROMSIZE_KB_1024
143 default 0x200000 if UBOOT_ROMSIZE_KB_2048
144 default 0x400000 if UBOOT_ROMSIZE_KB_4096
145 default 0x800000 if UBOOT_ROMSIZE_KB_8192
146 default 0xc00000 if UBOOT_ROMSIZE_KB_12288
147 default 0x1000000 if UBOOT_ROMSIZE_KB_16384
150 bool "Platform requires Intel Management Engine"
152 Newer higher-end devices have an Intel Management Engine (ME)
153 which is a very large binary blob (typically 1.5MB) which is
154 required for the platform to work. This enforces a particular
155 SPI flash format. You will need to supply the me.bin file in
156 your board directory.
159 bool "Perform a simple RAM test after SDRAM initialisation"
161 If there is something wrong with SDRAM then the platform will
162 often crash within U-Boot or the kernel. This option enables a
163 very simple RAM test that quickly checks whether the SDRAM seems
164 to work correctly. It is not exhaustive but can save time by
165 detecting obvious failures.
167 config MARK_GRAPHICS_MEM_WRCOMB
168 bool "Mark graphics memory as write-combining."
171 The graphics performance may increase if the graphics
172 memory is set as write-combining cache type. This option
173 enables marking the graphics memory as write-combining.
177 config FRAMEBUFFER_SET_VESA_MODE
178 prompt "Set framebuffer graphics resolution"
181 Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
184 prompt "framebuffer graphics resolution"
185 default FRAMEBUFFER_VESA_MODE_117
186 depends on FRAMEBUFFER_SET_VESA_MODE
188 This option sets the resolution used for the coreboot framebuffer (and
191 config FRAMEBUFFER_VESA_MODE_100
192 bool "640x400 256-color"
194 config FRAMEBUFFER_VESA_MODE_101
195 bool "640x480 256-color"
197 config FRAMEBUFFER_VESA_MODE_102
198 bool "800x600 16-color"
200 config FRAMEBUFFER_VESA_MODE_103
201 bool "800x600 256-color"
203 config FRAMEBUFFER_VESA_MODE_104
204 bool "1024x768 16-color"
206 config FRAMEBUFFER_VESA_MODE_105
207 bool "1024x7686 256-color"
209 config FRAMEBUFFER_VESA_MODE_106
210 bool "1280x1024 16-color"
212 config FRAMEBUFFER_VESA_MODE_107
213 bool "1280x1024 256-color"
215 config FRAMEBUFFER_VESA_MODE_108
218 config FRAMEBUFFER_VESA_MODE_109
221 config FRAMEBUFFER_VESA_MODE_10A
224 config FRAMEBUFFER_VESA_MODE_10B
227 config FRAMEBUFFER_VESA_MODE_10C
230 config FRAMEBUFFER_VESA_MODE_10D
231 bool "320x200 32k-color (1:5:5:5)"
233 config FRAMEBUFFER_VESA_MODE_10E
234 bool "320x200 64k-color (5:6:5)"
236 config FRAMEBUFFER_VESA_MODE_10F
237 bool "320x200 16.8M-color (8:8:8)"
239 config FRAMEBUFFER_VESA_MODE_110
240 bool "640x480 32k-color (1:5:5:5)"
242 config FRAMEBUFFER_VESA_MODE_111
243 bool "640x480 64k-color (5:6:5)"
245 config FRAMEBUFFER_VESA_MODE_112
246 bool "640x480 16.8M-color (8:8:8)"
248 config FRAMEBUFFER_VESA_MODE_113
249 bool "800x600 32k-color (1:5:5:5)"
251 config FRAMEBUFFER_VESA_MODE_114
252 bool "800x600 64k-color (5:6:5)"
254 config FRAMEBUFFER_VESA_MODE_115
255 bool "800x600 16.8M-color (8:8:8)"
257 config FRAMEBUFFER_VESA_MODE_116
258 bool "1024x768 32k-color (1:5:5:5)"
260 config FRAMEBUFFER_VESA_MODE_117
261 bool "1024x768 64k-color (5:6:5)"
263 config FRAMEBUFFER_VESA_MODE_118
264 bool "1024x768 16.8M-color (8:8:8)"
266 config FRAMEBUFFER_VESA_MODE_119
267 bool "1280x1024 32k-color (1:5:5:5)"
269 config FRAMEBUFFER_VESA_MODE_11A
270 bool "1280x1024 64k-color (5:6:5)"
272 config FRAMEBUFFER_VESA_MODE_11B
273 bool "1280x1024 16.8M-color (8:8:8)"
275 config FRAMEBUFFER_VESA_MODE_USER
276 bool "Manually select VESA mode"
280 # Map the config names to an integer (KB).
281 config FRAMEBUFFER_VESA_MODE
282 prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
284 default 0x100 if FRAMEBUFFER_VESA_MODE_100
285 default 0x101 if FRAMEBUFFER_VESA_MODE_101
286 default 0x102 if FRAMEBUFFER_VESA_MODE_102
287 default 0x103 if FRAMEBUFFER_VESA_MODE_103
288 default 0x104 if FRAMEBUFFER_VESA_MODE_104
289 default 0x105 if FRAMEBUFFER_VESA_MODE_105
290 default 0x106 if FRAMEBUFFER_VESA_MODE_106
291 default 0x107 if FRAMEBUFFER_VESA_MODE_107
292 default 0x108 if FRAMEBUFFER_VESA_MODE_108
293 default 0x109 if FRAMEBUFFER_VESA_MODE_109
294 default 0x10A if FRAMEBUFFER_VESA_MODE_10A
295 default 0x10B if FRAMEBUFFER_VESA_MODE_10B
296 default 0x10C if FRAMEBUFFER_VESA_MODE_10C
297 default 0x10D if FRAMEBUFFER_VESA_MODE_10D
298 default 0x10E if FRAMEBUFFER_VESA_MODE_10E
299 default 0x10F if FRAMEBUFFER_VESA_MODE_10F
300 default 0x110 if FRAMEBUFFER_VESA_MODE_110
301 default 0x111 if FRAMEBUFFER_VESA_MODE_111
302 default 0x112 if FRAMEBUFFER_VESA_MODE_112
303 default 0x113 if FRAMEBUFFER_VESA_MODE_113
304 default 0x114 if FRAMEBUFFER_VESA_MODE_114
305 default 0x115 if FRAMEBUFFER_VESA_MODE_115
306 default 0x116 if FRAMEBUFFER_VESA_MODE_116
307 default 0x117 if FRAMEBUFFER_VESA_MODE_117
308 default 0x118 if FRAMEBUFFER_VESA_MODE_118
309 default 0x119 if FRAMEBUFFER_VESA_MODE_119
310 default 0x11A if FRAMEBUFFER_VESA_MODE_11A
311 default 0x11B if FRAMEBUFFER_VESA_MODE_11B
312 default 0x117 if FRAMEBUFFER_VESA_MODE_USER
316 config TSC_CALIBRATION_BYPASS
317 bool "Bypass Time-Stamp Counter (TSC) calibration"
320 By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
321 running frequency via Model-Specific Register (MSR) and Programmable
322 Interval Timer (PIT). If the calibration does not work on your board,
323 select this option and provide a hardcoded TSC running frequency with
324 CONFIG_TSC_FREQ_IN_MHZ below.
326 Normally this option should be turned on in a simulation environment
329 config TSC_FREQ_IN_MHZ
330 int "Time-Stamp Counter (TSC) running frequency in MHz"
331 depends on TSC_CALIBRATION_BYPASS
334 The running frequency in MHz of Time-Stamp Counter (TSC).
336 source "arch/x86/cpu/ivybridge/Kconfig"
338 source "arch/x86/cpu/queensbay/Kconfig"
340 source "board/coreboot/coreboot/Kconfig"
342 source "board/google/chromebook_link/Kconfig"
344 source "board/intel/crownbay/Kconfig"