arch/sh/lib/time.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2009
   4  * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   5  *
   6  * (C) Copyright 2007-2012
   7  * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
   8  *
   9  * (C) Copyright 2003
  10  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  11  */
  12
  13 #include <common.h>
  14 #include <asm/processor.h>
  15 #include <asm/io.h>
  16
  17 #if defined(CONFIG_CPU_SH3)
  18 struct tmu_regs {
  19         u8      tocr;
  20         u8      reserved0;
  21         u8      tstr;
  22         u8      reserved1;
  23         u32     tcor0;
  24         u32     tcnt0;
  25         u16     tcr0;
  26         u16     reserved2;
  27         u32     tcor1;
  28         u32     tcnt1;
  29         u16     tcr1;
  30         u16     reserved3;
  31         u32     tcor2;
  32         u32     tcnt2;
  33         u16     tcr2;
  34         u16     reserved4;
  35         u32     tcpr2;
  36 };
  37 #endif /* CONFIG_CPU_SH3 */
  38
  39 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
  40 struct tmu_regs {
  41         u32     reserved;
  42         u8      tstr;
  43         u8      reserved2[3];
  44         u32     tcor0;
  45         u32     tcnt0;
  46         u16     tcr0;
  47         u16     reserved3;
  48         u32     tcor1;
  49         u32     tcnt1;
  50         u16     tcr1;
  51         u16     reserved4;
  52         u32     tcor2;
  53         u32     tcnt2;
  54         u16     tcr2;
  55         u16     reserved5;
  56 };
  57 #endif /* CONFIG_CPU_SH4 */
  58
  59 #define TCR_TPSC 0x07
  60 #define TSTR_STR0       BIT(0)
  61
  62 static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
  63
  64 unsigned long get_tbclk(void)
  65 {
  66 #ifdef CONFIG_RCAR_GEN2
  67         return CONFIG_SYS_CLK_FREQ / 8;
  68 #else
  69         return CONFIG_SYS_CLK_FREQ / 4;
  70 #endif
  71 }
  72
  73 unsigned long timer_read_counter(void)
  74 {
  75         return ~readl(&tmu->tcnt0);
  76 }
  77
  78 int timer_init(void)
  79 {
  80         writew(readw(&tmu->tcr0) & ~TCR_TPSC, &tmu->tcr0);
  81         writeb(readb(&tmu->tstr) & ~TSTR_STR0, &tmu->tstr);
  82         writeb(readb(&tmu->tstr) | TSTR_STR0, &tmu->tstr);
  83
  84         return 0;
  85 }
  86