2 * (C) Copyright 2008, 2011 Renesas Solutions Corp.
4 * SH7724 Internal I/O register
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef _ASM_CPU_SH7724_H_
10 #define _ASM_CPU_SH7724_H_
12 #define CACHE_OC_NUM_WAYS 4
13 #define CCR_CACHE_INIT 0x0000090d
16 #define TRA 0xFF000020
17 #define EXPEVT 0xFF000024
18 #define INTEVT 0xFF000028
21 #define PTEH 0xFF000000
22 #define PTEL 0xFF000004
23 #define TTB 0xFF000008
24 #define TEA 0xFF00000C
25 #define MMUCR 0xFF000010
26 #define PASCR 0xFF000070
27 #define IRMCR 0xFF000078
30 #define CCR 0xFF00001C
31 #define RAMCR 0xFF000074
36 #define MMSELR 0xFF800020
37 #define CMNCR 0xFEC10000
38 #define CS0BCR 0xFEC10004
39 #define CS2BCR 0xFEC10008
40 #define CS4BCR 0xFEC10010
41 #define CS5ABCR 0xFEC10014
42 #define CS5BBCR 0xFEC10018
43 #define CS6ABCR 0xFEC1001C
44 #define CS6BBCR 0xFEC10020
45 #define CS0WCR 0xFEC10024
46 #define CS2WCR 0xFEC10028
47 #define CS4WCR 0xFEC10030
48 #define CS5AWCR 0xFEC10034
49 #define CS5BWCR 0xFEC10038
50 #define CS6AWCR 0xFEC1003C
51 #define CS6BWCR 0xFEC10040
52 #define RBWTCNT 0xFEC10054
55 #define SBSC_SDCR 0xFE400008
56 #define SBSC_SDWCR 0xFE40000C
57 #define SBSC_SDPCR 0xFE400010
58 #define SBSC_RTCSR 0xFE400014
59 #define SBSC_RTCNT 0xFE400018
60 #define SBSC_RTCOR 0xFE40001C
61 #define SBSC_RFCR 0xFE400020
64 #define DBKIND 0xFD000008
65 #define DBSTATE 0xFD00000C
66 #define DBEN 0xFD000010
67 #define DBCMDCNT 0xFD000014
68 #define DBCKECNT 0xFD000018
69 #define DBCONF 0xFD000020
70 #define DBTR0 0xFD000030
71 #define DBTR1 0xFD000034
72 #define DBTR2 0xFD000038
73 #define DBTR3 0xFD00003C
74 #define DBRFPDN0 0xFD000040
75 #define DBRFPDN1 0xFD000044
76 #define DBRFPDN2 0xFD000048
77 #define DBRFSTS 0xFD00004C
78 #define DBMRCNT 0xFD000060
79 #define DBPDCNT0 0xFD000108
84 #define FRQCRA 0xA4150000
85 #define FRQCRB 0xA4150004
87 #define VCLKCR 0xA4150004
88 #define SCLKACR 0xA4150008
89 #define SCLKBCR 0xA415000C
90 #define IRDACLKCR 0xA4150018
91 #define PLLCR 0xA4150024
92 #define DLLFRQ 0xA4150050
95 #define STBCR 0xA4150020
96 #define MSTPCR0 0xA4150030
97 #define MSTPCR1 0xA4150034
98 #define MSTPCR2 0xA4150038
101 #define RWTCNT 0xA4520000
102 #define RWTCSR 0xA4520004
106 #define TMU_BASE 0xFFD80000
111 #define CMSTR 0xA44A0000
112 #define CMCSR 0xA44A0060
113 #define CMCNT 0xA44A0064
114 #define CMCOR 0xA44A0068
119 #define SCIF0_BASE 0xFFE00000
120 #define SCIF1_BASE 0xFFE10000
121 #define SCIF2_BASE 0xFFE20000
122 #define SCIF3_BASE 0xa4e30000
123 #define SCIF4_BASE 0xa4e40000
124 #define SCIF5_BASE 0xa4e50000
144 #define PACR 0xA4050100
145 #define PBCR 0xA4050102
146 #define PCCR 0xA4050104
147 #define PDCR 0xA4050106
148 #define PECR 0xA4050108
149 #define PFCR 0xA405010A
150 #define PGCR 0xA405010C
151 #define PHCR 0xA405010E
152 #define PJCR 0xA4050110
153 #define PKCR 0xA4050112
154 #define PLCR 0xA4050114
155 #define PMCR 0xA4050116
156 #define PNCR 0xA4050118
157 #define PQCR 0xA405011A
158 #define PRCR 0xA405011C
159 #define PSCR 0xA405011E
160 #define PTCR 0xA4050140
161 #define PUCR 0xA4050142
162 #define PVCR 0xA4050144
163 #define PWCR 0xA4050146
164 #define PXCR 0xA4050148
165 #define PYCR 0xA405014A
166 #define PZCR 0xA405014C
167 #define PSELA 0xA405014E
168 #define PSELB 0xA4050150
169 #define PSELC 0xA4050152
170 #define PSELD 0xA4050154
171 #define PSELE 0xA4050156
172 #define HIZCRA 0xA4050158
173 #define HIZCRB 0xA405015A
174 #define HIZCRC 0xA405015C
175 #define HIZCRD 0xA405015E
176 #define MSELCRA 0xA4050180
177 #define MSELCRB 0xA4050182
178 #define PULCR 0xA4050184
179 #define DRVCRA 0xA405018A
180 #define DRVCRB 0xA405018C
183 #define PADR 0xA4050120
184 #define PBDR 0xA4050122
185 #define PCDR 0xA4050124
186 #define PDDR 0xA4050126
187 #define PEDR 0xA4050128
188 #define PFDR 0xA405012A
189 #define PGDR 0xA405012C
190 #define PHDR 0xA405012E
191 #define PJDR 0xA4050130
192 #define PKDR 0xA4050132
193 #define PLDR 0xA4050134
194 #define PMDR 0xA4050136
195 #define PNDR 0xA4050138
196 #define PQDR 0xA405013A
197 #define PRDR 0xA405013C
198 #define PSDR 0xA405013E
199 #define PTDR 0xA4050160
200 #define PUDR 0xA4050162
201 #define PVDR 0xA4050164
202 #define PWDR 0xA4050166
203 #define PXDR 0xA4050168
204 #define PYDR 0xA405016A
205 #define PZDR 0xA405016C
208 #define EDMR 0xA4600000
213 #endif /* _ASM_CPU_SH7724_H_ */