2 * (C) Copyright 2016 Vladimir Zapolskiy <vz@mleia.com>
3 * (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/processor.h>
12 #include <asm/system.h>
15 #define CACHE_UPDATED 2
17 static inline void cache_wback_all(void)
19 unsigned long addr, data, i, j;
21 for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) {
22 for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
23 addr = CACHE_OC_ADDRESS_ARRAY
24 | (j << CACHE_OC_WAY_SHIFT)
25 | (i << CACHE_OC_ENTRY_SHIFT);
27 if (data & CACHE_UPDATED) {
28 data &= ~CACHE_UPDATED;
35 #define CACHE_ENABLE 0
36 #define CACHE_DISABLE 1
38 static int cache_control(unsigned int cmd)
45 if (ccr & CCR_CACHE_ENABLE)
48 if (cmd == CACHE_DISABLE)
49 outl(CCR_CACHE_STOP, CCR);
51 outl(CCR_CACHE_INIT, CCR);
57 void flush_dcache_range(unsigned long start, unsigned long end)
61 start &= ~(L1_CACHE_BYTES - 1);
62 for (v = start; v < end; v += L1_CACHE_BYTES) {
63 asm volatile ("ocbp %0" : /* no output */
68 void invalidate_dcache_range(unsigned long start, unsigned long end)
72 start &= ~(L1_CACHE_BYTES - 1);
73 for (v = start; v < end; v += L1_CACHE_BYTES) {
74 asm volatile ("ocbi %0" : /* no output */
79 void flush_cache(unsigned long addr, unsigned long size)
81 flush_dcache_range(addr , addr + size);
84 void icache_enable(void)
86 cache_control(CACHE_ENABLE);
89 void icache_disable(void)
91 cache_control(CACHE_DISABLE);
94 int icache_status(void)
99 void dcache_enable(void)
103 void dcache_disable(void)
107 int dcache_status(void)