arch/riscv/lib/interrupts.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2016-17 Microsemi Corporation.
   4  * Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
   5  *
   6  * Copyright (C) 2017 Andes Technology Corporation
   7  * Rick Chen, Andes Technology Corporation <rick@andestech.com>
   8  */
   9
  10 #include <common.h>
  11 #include <asm/ptrace.h>
  12 #include <asm/system.h>
  13 #include <asm/encoding.h>
  14
  15 static void _exit_trap(ulong code, ulong epc, struct pt_regs *regs)
  16 {
  17         static const char * const exception_code[] = {
  18                 "Instruction address misaligned",
  19                 "Instruction access fault",
  20                 "Illegal instruction",
  21                 "Breakpoint",
  22                 "Load address misaligned",
  23                 "Load access fault",
  24                 "Store/AMO address misaligned",
  25                 "Store/AMO access fault",
  26                 "Environment call from U-mode",
  27                 "Environment call from S-mode",
  28                 "Reserved",
  29                 "Environment call from M-mode",
  30                 "Instruction page fault",
  31                 "Load page fault",
  32                 "Reserved",
  33                 "Store/AMO page fault",
  34         };
  35
  36         if (code < ARRAY_SIZE(exception_code)) {
  37                 printf("exception code: %ld , %s , epc %lx , ra %lx\n",
  38                        code, exception_code[code], epc, regs->ra);
  39         } else {
  40                 printf("reserved exception code: %ld , epc %lx , ra %lx\n",
  41                        code, epc, regs->ra);
  42         }
  43
  44         hang();
  45 }
  46
  47 int interrupt_init(void)
  48 {
  49         return 0;
  50 }
  51
  52 /*
  53  * enable interrupts
  54  */
  55 void enable_interrupts(void)
  56 {
  57 }
  58
  59 /*
  60  * disable interrupts
  61  */
  62 int disable_interrupts(void)
  63 {
  64         return 0;
  65 }
  66
  67 ulong handle_trap(ulong cause, ulong epc, struct pt_regs *regs)
  68 {
  69         ulong is_irq, irq;
  70
  71         is_irq = (cause & MCAUSE_INT);
  72         irq = (cause & ~MCAUSE_INT);
  73
  74         if (is_irq) {
  75                 switch (irq) {
  76                 case IRQ_M_EXT:
  77                 case IRQ_S_EXT:
  78                         external_interrupt(0);  /* handle external interrupt */
  79                         break;
  80                 case IRQ_M_TIMER:
  81                 case IRQ_S_TIMER:
  82                         timer_interrupt(0);     /* handle timer interrupt */
  83                         break;
  84                 default:
  85                         _exit_trap(cause, epc, regs);
  86                         break;
  87                 };
  88         } else {
  89                 _exit_trap(cause, epc, regs);
  90         }
  91
  92         return epc;
  93 }
  94
  95 /*
  96  *Entry Point for PLIC Interrupt Handler
  97  */
  98 __attribute__((weak)) void external_interrupt(struct pt_regs *regs)
  99 {
 100 }
 101
 102 __attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
 103 {
 104 }