1 menu "RISC-V architecture"
11 config TARGET_AX25_AE350
12 bool "Support ax25-ae350"
14 config TARGET_QEMU_VIRT
15 bool "Support QEMU Virt Board"
19 # board-specific options below
20 source "board/AndesTech/ax25-ae350/Kconfig"
21 source "board/emulation/qemu-riscv/Kconfig"
23 # platform-specific options below
24 source "arch/riscv/cpu/ax25/Kconfig"
26 # architecture-specific options below
36 Choose this option to target the RV32I base integer instruction set.
43 Choose this option to target the RV64I base integer instruction set.
52 bool "medium low code model"
54 U-Boot and its statically defined symbols must lie within a single 2 GiB
55 address range and must lie between absolute addresses -2 GiB and +2 GiB.
58 bool "medium any code model"
60 U-Boot and its statically defined symbols must be within any single 2 GiB
66 bool "Emit compressed instructions"
69 Adds "C" to the ISA subsets that the toolchain is allowed to emit
70 when building U-Boot, which results in compressed instructions in the
79 Enable this option to build U-Boot for RISC-V S-Mode