2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000, 2001,2002 Wolfgang Denk <wd@denx.de>
5 * Copyright Freescale Semiconductor, Inc. 2004, 2006.
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <ppc_asm.tmpl>
14 #include <asm/cache.h>
16 /*------------------------------------------------------------------------------- */
17 /* Function: ppcDcbf */
18 /* Description: Data Cache block flush */
19 /* Input: r3 = effective address */
21 /*------------------------------------------------------------------------------- */
27 /*------------------------------------------------------------------------------- */
28 /* Function: ppcDcbi */
29 /* Description: Data Cache block Invalidate */
30 /* Input: r3 = effective address */
32 /*------------------------------------------------------------------------------- */
38 /*--------------------------------------------------------------------------
40 * Description: Data Cache block zero.
41 * Input: r3 = effective address
43 *-------------------------------------------------------------------------- */
50 /*------------------------------------------------------------------------------- */
51 /* Function: ppcSync */
52 /* Description: Processor Synchronize */
55 /*------------------------------------------------------------------------------- */
62 * Write any modified data cache blocks out to memory and invalidate them.
63 * Does not invalidate the corresponding instruction cache blocks.
65 * flush_dcache_range(unsigned long start, unsigned long stop)
67 _GLOBAL(flush_dcache_range)
68 #if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
69 li r5,L1_CACHE_BYTES-1
73 srwi. r4,r4,L1_CACHE_SHIFT
78 addi r3,r3,L1_CACHE_BYTES
80 sync /* wait for dcbst's to get to ram */
85 * Like above, but invalidate the D-cache. This is used by the 8xx
86 * to invalidate the cache so the PPC core doesn't get stale data
87 * from the CPM (no cache snooping here :-).
89 * invalidate_dcache_range(unsigned long start, unsigned long stop)
91 _GLOBAL(invalidate_dcache_range)
92 #if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
93 li r5,L1_CACHE_BYTES-1
97 srwi. r4,r4,L1_CACHE_SHIFT
103 addi r3,r3,L1_CACHE_BYTES
105 sync /* wait for dcbi's to get to ram */