1 // SPDX-License-Identifier: GPL-2.0+
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
11 void flush_cache(ulong start_addr, ulong size)
14 ulong addr, start, end;
16 start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
17 end = start_addr + size - 1;
19 for (addr = start; (addr <= end) && (addr >= start);
20 addr += CONFIG_SYS_CACHELINE_SIZE) {
21 asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
24 /* wait for all dcbst to complete on bus */
25 asm volatile("sync" : : : "memory");
27 for (addr = start; (addr <= end) && (addr >= start);
28 addr += CONFIG_SYS_CACHELINE_SIZE) {
29 asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
32 asm volatile("sync" : : : "memory");
33 /* flush prefetch queue */
34 asm volatile("isync" : : : "memory");