1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * P2041 Silicon/SoC Device Tree Source (pre include)
5 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
11 /include/ "e500mc_power_isa.dtsi"
14 compatible = "fsl,P2041";
17 interrupt-parent = <&mpic>;
23 cpu0: PowerPC,e500mc@0 {
26 fsl,portid-mapping = <0x80000000>;
28 cpu1: PowerPC,e500mc@1 {
31 fsl,portid-mapping = <0x40000000>;
33 cpu2: PowerPC,e500mc@2 {
36 fsl,portid-mapping = <0x20000000>;
38 cpu3: PowerPC,e500mc@3 {
41 fsl,portid-mapping = <0x10000000>;
46 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
47 reg = <0xf 0xfe000000 0 0x00001000>;
51 compatible = "simple-bus";
56 #interrupt-cells = <4>;
57 reg = <0x40000 0x40000>;
58 compatible = "fsl,mpic", "chrp,open-pic";
59 device_type = "open-pic";
60 clock-frequency = <0x0>;