1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * P2020 Silicon/SoC Device Tree Source (post include)
5 * Copyright 2013 Freescale Semiconductor Inc.
13 compatible = "fsl,p2020-immr", "simple-bus";
14 bus-frequency = <0x0>;
19 #interrupt-cells = <4>;
20 reg = <0x40000 0x40000>;
21 compatible = "fsl,mpic";
22 device_type = "open-pic";
25 last-interrupt-source = <255>;
29 /* PCIe controller base address 0x8000 */
31 compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
36 bus-range = <0x0 0xff>;
39 /* PCIe controller base address 0x9000 */
41 compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
46 bus-range = <0x0 0xff>;
49 /* PCIe controller base address 0xa000 */
51 compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
56 bus-range = <0x0 0xff>;