1 #include <dt-bindings/memory/mpc83xx-sdram.h>
2 #include <dt-bindings/clk/mpc83xx-clk.h>
8 i2c2 = "/fpga0bus/fpga0_iic_main";
9 i2c3 = "/fpga0bus/fpga0_iic_video0";
10 i2c4 = "/fpga0bus/fpga0_iic_video1";
11 i2c5 = "/fpga0bus/fpga0_iic_usb";
12 gdsys_soc0 = "/fpga0bus";
13 gdsys_soc1 = "/fpga1bus";
14 ioep0 = "/fpga0bus/fpga0_ep0";
15 ioep1 = "/fpga0bus/fpga1_ep0";
19 stdout-path = &serial1;
23 compatible = "cpu_bus";
27 compatible = "fsl,mpc8308";
28 clocks = <&socclocks MPC83XX_CLK_CORE
29 &socclocks MPC83XX_CLK_CSB>;
35 compatible = "gdsys,board_gazerbeam";
51 ver-gpios = <&PPCPCA 12 0
57 var-gpios-mc2 = <&GPIO_VB0 0 0 /* VAR-MC_SC */
58 &GPIO_VB0 11 0>; /* VAR-CON */
60 var-gpios-mc4 = <&GPIO_VB1 0 0 /* VAR-MC_SC */
61 &GPIO_VB1 11 0>; /* VAR-CON */
63 reset-gpios = <&gpio0 1 0 &gpio0 2 1>;
67 compatible = "fsl,mpc8308-clk";
73 compatible = "fsl,mpc83xx-timer";
74 clocks = <&socclocks MPC83XX_CLK_CSB>;
79 reset-gpios = <&PPCPCA 26 0>;
80 done-gpios = <&GPIO_VB0 19 0>;
88 ranges = <0x0 0xe0600000 0x00004000>;
97 RXAUI0_0: fpga0_rxaui@fc0 {
98 compatible = "gdsys,rxaui_ctrl";
126 RXAUI0_1: fpga0_rxaui@fd0 {
127 compatible = "gdsys,rxaui_ctrl";
131 RXAUI0_2: fpga0_rxaui@fe0 {
132 compatible = "gdsys,rxaui_ctrl";
136 RXAUI0_3: fpga0_rxaui@ff0 {
137 compatible = "gdsys,rxaui_ctrl";
143 ranges = <0x0 0xe0700000 0x00004000>;
152 RXAUI1_0: fpga0_rxaui@fc0 {
153 compatible = "gdsys,rxaui_ctrl";
164 RXAUI1_1: fpga0_rxaui@fd0 {
165 compatible = "gdsys,rxaui_ctrl";
169 RXAUI1_2: fpga0_rxaui@fe0 {
170 compatible = "gdsys,rxaui_ctrl";
174 RXAUI1_3: fpga0_rxaui@ff0 {
175 compatible = "gdsys,rxaui_ctrl";
182 clocks = <&socclocks MPC83XX_CLK_CSB>;
189 clocks = <&socclocks MPC83XX_CLK_SDHC>;
193 SERDES: serdes@e3000 {
194 reg = <0xe3000 0x200>;
195 compatible = "fsl,mpc83xx-serdes";
203 clocks = <&socclocks MPC83XX_CLK_I2C1>;
214 u-boot,i2c-offset-len = <0>;
219 clocks = <&socclocks MPC83XX_CLK_I2C2>;
221 GPIO_VB0: pca9698@20 {
225 GPIO_VB1: pca9698@22 {
239 clocks = <&socclocks MPC83XX_CLK_CSB>;
244 clocks = <&socclocks MPC83XX_CLK_CSB>;
249 clocks = <&socclocks MPC83XX_CLK_PCIEXP1>;