2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
10 #include <asm/fsl_lbc.h>
13 /* Boards should provide their own version of this if they use lbc sdram */
14 static void __lbc_sdram_init(void)
18 void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
22 void print_lbc_regs(void)
26 printf("\nLocal Bus Controller Registers\n");
27 for (i = 0; i < 8; i++) {
28 printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
29 i, get_lbc_br(i), i, get_lbc_or(i));
31 printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
32 get_lbc_lbcr(), get_lbc_lcrr());
35 void init_early_memctl_regs(void)
39 #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
40 /* Set the local bus monitor timeout value to the maximum */
41 clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
45 /* if cs1 is already set via debugger, leave cs0/cs1 alone */
46 if (get_lbc_br(1) & BR_V)
51 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at
52 * preliminary addresses - these have to be modified later
53 * when FLASH size has been determined
55 #if defined(CONFIG_SYS_OR0_REMAP)
56 set_lbc_or(0, CONFIG_SYS_OR0_REMAP);
58 #if defined(CONFIG_SYS_OR1_REMAP)
59 set_lbc_or(1, CONFIG_SYS_OR1_REMAP);
61 /* now restrict to preliminary range */
63 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
64 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM);
65 set_lbc_or(0, CONFIG_SYS_OR0_PRELIM);
68 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
69 set_lbc_or(1, CONFIG_SYS_OR1_PRELIM);
70 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM);
74 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
75 set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
76 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
79 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
80 set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
81 set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
84 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
85 set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
86 set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
89 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
90 set_lbc_or(5, CONFIG_SYS_OR5_PRELIM);
91 set_lbc_br(5, CONFIG_SYS_BR5_PRELIM);
94 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
95 set_lbc_or(6, CONFIG_SYS_OR6_PRELIM);
96 set_lbc_br(6, CONFIG_SYS_BR6_PRELIM);
99 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
100 set_lbc_or(7, CONFIG_SYS_OR7_PRELIM);
101 set_lbc_br(7, CONFIG_SYS_BR7_PRELIM);
106 * Configures a UPM. The function requires the respective MxMR to be set
107 * before calling this function. "size" is the number or entries, not a sizeof.
109 void upmconfig(uint upm, uint *table, uint size)
111 fsl_lbc_t *lbc = LBC_BASE_ADDR;
112 int i, mad, old_mad = 0;
113 u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK);
114 u32 msel = BR_UPMx_TO_MSEL(upm);
115 u32 *mxmr = &lbc->mamr + upm;
116 volatile u8 *dummy = NULL;
118 if (upm < UPMA || upm > UPMC) {
119 printf("Error: %s() Bad UPM index %d\n", __func__, upm);
124 * Find the address for the dummy write - scan all of the BRs until we
125 * find one matching the UPM and extract the base address bits from it.
127 for (i = 0; i < 8; i++) {
128 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) {
129 dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
135 printf("Error: %s() No matching BR\n", __func__);
139 /* Program UPM using steps outlined by the reference manual */
140 for (i = 0; i < size; i++) {
141 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i);
142 out_be32(&lbc->mdr, table[i]);
143 (void)in_be32(&lbc->mdr);
146 mad = in_be32(mxmr) & MxMR_MAD_MSK;
147 } while (mad <= old_mad && !(!mad && i == (size-1)));
151 /* Return to normal operation */
152 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM);