1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
8 #include <asm/fsl_lbc.h>
11 #include "../mpc83xx/elbc/elbc.h"
15 /* Boards should provide their own version of this if they use lbc sdram */
16 static void __lbc_sdram_init(void)
20 void lbc_sdram_init(void) __attribute__((weak, alias("__lbc_sdram_init")));
24 void print_lbc_regs(void)
28 printf("\nLocal Bus Controller Registers\n");
29 for (i = 0; i < 8; i++) {
30 printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
31 i, get_lbc_br(i), i, get_lbc_or(i));
33 printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
34 get_lbc_lbcr(), get_lbc_lcrr());
37 void init_early_memctl_regs(void)
41 #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
42 /* Set the local bus monitor timeout value to the maximum */
43 clrsetbits_be32(&(LBC_BASE_ADDR)->lbcr, LBCR_BMT|LBCR_BMTPS, 0xf);
47 /* if cs1 is already set via debugger, leave cs0/cs1 alone */
48 if (get_lbc_br(1) & BR_V)
53 * Map banks 0 (and maybe 1) to the FLASH banks 0 (and 1) at
54 * preliminary addresses - these have to be modified later
55 * when FLASH size has been determined
57 #if defined(CONFIG_SYS_OR0_REMAP)
58 set_lbc_or(0, CONFIG_SYS_OR0_REMAP);
60 #if defined(CONFIG_SYS_OR1_REMAP)
61 set_lbc_or(1, CONFIG_SYS_OR1_REMAP);
63 /* now restrict to preliminary range */
65 #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM)
66 set_lbc_br(0, CONFIG_SYS_BR0_PRELIM);
67 set_lbc_or(0, CONFIG_SYS_OR0_PRELIM);
70 #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM)
71 set_lbc_or(1, CONFIG_SYS_OR1_PRELIM);
72 set_lbc_br(1, CONFIG_SYS_BR1_PRELIM);
76 #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM)
77 set_lbc_or(2, CONFIG_SYS_OR2_PRELIM);
78 set_lbc_br(2, CONFIG_SYS_BR2_PRELIM);
81 #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM)
82 set_lbc_or(3, CONFIG_SYS_OR3_PRELIM);
83 set_lbc_br(3, CONFIG_SYS_BR3_PRELIM);
86 #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM)
87 set_lbc_or(4, CONFIG_SYS_OR4_PRELIM);
88 set_lbc_br(4, CONFIG_SYS_BR4_PRELIM);
91 #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM)
92 set_lbc_or(5, CONFIG_SYS_OR5_PRELIM);
93 set_lbc_br(5, CONFIG_SYS_BR5_PRELIM);
96 #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM)
97 set_lbc_or(6, CONFIG_SYS_OR6_PRELIM);
98 set_lbc_br(6, CONFIG_SYS_BR6_PRELIM);
101 #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM)
102 set_lbc_or(7, CONFIG_SYS_OR7_PRELIM);
103 set_lbc_br(7, CONFIG_SYS_BR7_PRELIM);
108 * Configures a UPM. The function requires the respective MxMR to be set
109 * before calling this function. "size" is the number or entries, not a sizeof.
111 void upmconfig(uint upm, uint *table, uint size)
113 fsl_lbc_t *lbc = LBC_BASE_ADDR;
114 int i, mad, old_mad = 0;
115 u32 mask = (~MxMR_OP_MSK & ~MxMR_MAD_MSK);
116 u32 msel = BR_UPMx_TO_MSEL(upm);
117 u32 *mxmr = &lbc->mamr + upm;
118 volatile u8 *dummy = NULL;
120 if (upm < UPMA || upm > UPMC) {
121 printf("Error: %s() Bad UPM index %d\n", __func__, upm);
126 * Find the address for the dummy write - scan all of the BRs until we
127 * find one matching the UPM and extract the base address bits from it.
129 for (i = 0; i < 8; i++) {
130 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) {
131 dummy = (volatile u8 *)(get_lbc_br(i) & BR_BA);
137 printf("Error: %s() No matching BR\n", __func__);
141 /* Program UPM using steps outlined by the reference manual */
142 for (i = 0; i < size; i++) {
143 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_WARR | i);
144 out_be32(&lbc->mdr, table[i]);
145 (void)in_be32(&lbc->mdr);
148 mad = in_be32(mxmr) & MxMR_MAD_MSK;
149 } while (mad <= old_mad && !(!mad && i == (size-1)));
153 /* Return to normal operation */
154 out_be32(mxmr, (in_be32(mxmr) & mask) | MxMR_OP_NORM);