2 * Copyright 2009-2012 Freescale Semiconductor, Inc.
4 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
5 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
6 * cpu specific common code for 85xx/86xx processors.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 #include <asm/cache.h>
35 DECLARE_GLOBAL_DATA_PTR;
37 struct cpu_type cpu_type_list [] = {
38 #if defined(CONFIG_MPC85xx)
39 CPU_TYPE_ENTRY(8533, 8533, 1),
40 CPU_TYPE_ENTRY(8535, 8535, 1),
41 CPU_TYPE_ENTRY(8536, 8536, 1),
42 CPU_TYPE_ENTRY(8540, 8540, 1),
43 CPU_TYPE_ENTRY(8541, 8541, 1),
44 CPU_TYPE_ENTRY(8543, 8543, 1),
45 CPU_TYPE_ENTRY(8544, 8544, 1),
46 CPU_TYPE_ENTRY(8545, 8545, 1),
47 CPU_TYPE_ENTRY(8547, 8547, 1),
48 CPU_TYPE_ENTRY(8548, 8548, 1),
49 CPU_TYPE_ENTRY(8555, 8555, 1),
50 CPU_TYPE_ENTRY(8560, 8560, 1),
51 CPU_TYPE_ENTRY(8567, 8567, 1),
52 CPU_TYPE_ENTRY(8568, 8568, 1),
53 CPU_TYPE_ENTRY(8569, 8569, 1),
54 CPU_TYPE_ENTRY(8572, 8572, 2),
55 CPU_TYPE_ENTRY(P1010, P1010, 1),
56 CPU_TYPE_ENTRY(P1011, P1011, 1),
57 CPU_TYPE_ENTRY(P1012, P1012, 1),
58 CPU_TYPE_ENTRY(P1013, P1013, 1),
59 CPU_TYPE_ENTRY(P1014, P1014, 1),
60 CPU_TYPE_ENTRY(P1017, P1017, 1),
61 CPU_TYPE_ENTRY(P1020, P1020, 2),
62 CPU_TYPE_ENTRY(P1021, P1021, 2),
63 CPU_TYPE_ENTRY(P1022, P1022, 2),
64 CPU_TYPE_ENTRY(P1023, P1023, 2),
65 CPU_TYPE_ENTRY(P1024, P1024, 2),
66 CPU_TYPE_ENTRY(P1025, P1025, 2),
67 CPU_TYPE_ENTRY(P2010, P2010, 1),
68 CPU_TYPE_ENTRY(P2020, P2020, 2),
69 CPU_TYPE_ENTRY(P2040, P2040, 4),
70 CPU_TYPE_ENTRY(P2041, P2041, 4),
71 CPU_TYPE_ENTRY(P3041, P3041, 4),
72 CPU_TYPE_ENTRY_MASK(P3060, P3060, 6, 0xf3),
73 CPU_TYPE_ENTRY(P4040, P4040, 4),
74 CPU_TYPE_ENTRY(P4080, P4080, 8),
75 CPU_TYPE_ENTRY(P5010, P5010, 1),
76 CPU_TYPE_ENTRY(P5020, P5020, 2),
77 CPU_TYPE_ENTRY(BSC9130, 9130, 1),
78 CPU_TYPE_ENTRY(BSC9131, 9131, 1),
79 #elif defined(CONFIG_MPC86xx)
80 CPU_TYPE_ENTRY(8610, 8610, 1),
81 CPU_TYPE_ENTRY(8641, 8641, 2),
82 CPU_TYPE_ENTRY(8641D, 8641D, 2),
86 struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 1);
88 struct cpu_type *identify_cpu(u32 ver)
91 for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) {
92 if (cpu_type_list[i].soc_ver == ver)
93 return &cpu_type_list[i];
95 return &cpu_type_unknown;
98 #define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
99 #define MPC8xxx_PICFRR_NCPU_SHIFT 8
102 * Return a 32-bit mask indicating which cores are present on this SOC.
106 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
107 struct cpu_type *cpu = gd->cpu;
109 /* better to query feature reporting register than just assume 1 */
110 if (cpu == &cpu_type_unknown)
111 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
112 MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
118 * Return the number of cores on this SOC.
121 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
122 struct cpu_type *cpu = gd->cpu;
124 /* better to query feature reporting register than just assume 1 */
125 if (cpu == &cpu_type_unknown)
126 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
127 MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
129 return cpu->num_cores;
133 * Check if the given core ID is valid
135 * Returns zero if it isn't, 1 if it is.
137 int is_core_valid(unsigned int core)
139 struct cpu_type *cpu = gd->cpu;
141 return !!((1 << core) & cpu->mask);
150 ver = SVR_SOC_VER(svr);
152 gd->cpu = identify_cpu(ver);
158 * Initializes on-chip ethernet controllers.
159 * to override, implement board_eth_init()
161 int cpu_eth_init(bd_t *bis)
163 #if defined(CONFIG_ETHER_ON_FCC)
167 #if defined(CONFIG_UEC_ETH)
168 uec_standard_init(bis);
171 #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
172 tsec_standard_init(bis);
175 #ifdef CONFIG_FMAN_ENET
176 fm_standard_init(bis);