2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
6 * SPDX-License-Identifier: GPL-2.0+
9 /* U-Boot - Startup Code for PowerPC based Embedded Boards
12 * The processor starts at 0x00000100 and the code is executed
13 * from flash. The code is organized to be at an other address
14 * in memory, but as long we don't jump around before relocating,
15 * board_init lies at a quite high address and when the cpu has
16 * jumped there, everything is ok.
17 * This works because the cpu gives the FLASH (CS0) the whole
18 * address space at startup, and board_init lies as a echo of
19 * the flash somewhere up there in the memory map.
21 * board_init will change CS0 to be positioned at the correct
22 * address and (s)dram will be positioned at address 0
24 #include <asm-offsets.h>
29 #define CONFIG_8xx 1 /* needed for Linux kernel header files */
30 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
32 #include <ppc_asm.tmpl>
35 #include <asm/cache.h>
37 #include <asm/u-boot.h>
39 /* We don't want the MMU yet.
42 #define MSR_KERNEL ( MSR_ME | MSR_RI ) /* Machine Check and Recoverable Interr. */
45 * Set up GOT: Global Offset Table
47 * Use r12 to access the GOT
50 GOT_ENTRY(_GOT2_TABLE_)
51 GOT_ENTRY(_FIXUP_TABLE_)
54 GOT_ENTRY(_start_of_vectors)
55 GOT_ENTRY(_end_of_vectors)
56 GOT_ENTRY(transfer_to_handler)
60 GOT_ENTRY(__bss_start)
64 * r3 - 1st arg to board_init(): IMMP pointer
65 * r4 - 2nd arg to board_init(): boot flag
68 .long 0x27051956 /* U-Boot Magic Number */
71 .ascii U_BOOT_VERSION_STRING, "\0"
76 lis r3, CONFIG_SYS_IMMR@h /* position IMMR */
79 /* Initialize machine status; enable machine check interrupt */
80 /*----------------------------------------------------------------------*/
81 li r3, MSR_KERNEL /* Set ME, RI flags */
83 mtspr SRR1, r3 /* Make SRR1 match MSR */
85 mfspr r3, ICR /* clear Interrupt Cause Register */
87 /* Initialize debug port registers */
88 /*----------------------------------------------------------------------*/
89 xor r0, r0, r0 /* Clear R0 */
90 mtspr LCTRL1, r0 /* Initialize debug port regs */
95 /* Reset the caches */
96 /*----------------------------------------------------------------------*/
98 mfspr r3, IC_CST /* Clear error bits */
101 lis r3, IDC_UNALL@h /* Unlock all */
105 lis r3, IDC_INVALL@h /* Invalidate all */
109 lis r3, IDC_DISABLE@h /* Disable data cache */
112 #if !defined(CONFIG_SYS_DELAYED_ICACHE)
113 /* On IP860 and PCU E,
114 * we cannot enable IC yet
116 lis r3, IDC_ENABLE@h /* Enable instruction cache */
120 /* invalidate all tlb's */
121 /*----------------------------------------------------------------------*/
127 * Calculate absolute address in FLASH and jump there
128 *----------------------------------------------------------------------*/
130 lis r3, CONFIG_SYS_MONITOR_BASE@h
131 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
132 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
138 /* initialize some SPRs that are hard to access from C */
139 /*----------------------------------------------------------------------*/
141 lis r3, CONFIG_SYS_IMMR@h /* pass IMMR as arg1 to C routine */
142 ori r1, r3, CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in internal DPRAM */
143 /* Note: R0 is still 0 here */
144 stwu r0, -4(r1) /* clear final stack frame so that */
145 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
148 * Disable serialized ifetch and show cycles
149 * (i.e. set processor to normal mode).
150 * This is also a silicon bug workaround, see errata
156 /* Set up debug mode entry */
158 lis r2, CONFIG_SYS_DER@h
159 ori r2, r2, CONFIG_SYS_DER@l
162 /* let the C-code set up the rest */
164 /* Be careful to keep code relocatable ! */
165 /*----------------------------------------------------------------------*/
167 GET_GOT /* initialize GOT access */
170 bl cpu_init_f /* run low-level CPU init code (from Flash) */
172 bl board_init_f /* run 1st part of board init code (from Flash) */
174 /* NOTREACHED - board_init_f() does not return */
177 .globl _start_of_vectors
181 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
183 /* Data Storage exception. "Never" generated on the 860. */
184 STD_EXCEPTION(0x300, DataStorage, UnknownException)
186 /* Instruction Storage exception. "Never" generated on the 860. */
187 STD_EXCEPTION(0x400, InstStorage, UnknownException)
189 /* External Interrupt exception. */
190 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
192 /* Alignment exception. */
195 EXCEPTION_PROLOG(SRR0, SRR1)
200 addi r3,r1,STACK_FRAME_OVERHEAD
201 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
203 /* Program check exception */
206 EXCEPTION_PROLOG(SRR0, SRR1)
207 addi r3,r1,STACK_FRAME_OVERHEAD
208 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
211 /* No FPU on MPC8xx. This exception is not supposed to happen.
213 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
215 /* I guess we could implement decrementer, and may have
216 * to someday for timekeeping.
218 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
219 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
220 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
221 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
222 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
224 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
225 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
227 /* On the MPC8xx, this is a software emulation interrupt. It occurs
228 * for all unimplemented and illegal instructions.
230 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
232 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
233 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
234 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
235 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
237 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
238 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
239 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
240 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
241 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
242 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
243 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
245 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
246 STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
247 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
248 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
251 .globl _end_of_vectors
258 * This code finishes saving the registers to the exception frame
259 * and jumps to the appropriate handler for the exception.
260 * Register r21 is pointer into trap frame, r1 has new stack pointer.
262 .globl transfer_to_handler
273 andi. r24,r23,0x3f00 /* get vector offset */
277 mtspr SPRG2,r22 /* r1 is now kernel sp */
278 lwz r24,0(r23) /* virtual address of handler */
279 lwz r23,4(r23) /* where to go when done */
284 rfi /* jump to handler, enable MMU */
287 mfmsr r28 /* Disable interrupts */
291 SYNC /* Some chip revs need this... */
306 lwz r2,_NIP(r1) /* Restore environment */
327 .globl icache_disable
330 lis r3, IDC_DISABLE@h
337 srwi r3, r3, 31 /* >>31 => select bit 0 */
346 lis r3, 0x0400 /* Set cache mode with MMU off */
360 .globl dcache_disable
363 lis r3, IDC_DISABLE@h
372 srwi r3, r3, 31 /* >>31 => select bit 0 */
382 * unsigned int get_immr (unsigned int mask)
384 * return (mask ? (IMMR & mask) : IMMR);
388 mr r4,r3 /* save mask */
389 mfspr r3, IMMR /* IMMR */
390 cmpwi 0,r4,0 /* mask != 0 ? */
392 and r3,r3,r4 /* IMMR & mask */
433 /*------------------------------------------------------------------------------*/
436 * void relocate_code (addr_sp, gd, addr_moni)
438 * This "function" does not return, instead it continues in RAM
439 * after relocating the monitor code.
443 * r5 = length in bytes
448 mr r1, r3 /* Set new stack pointer */
449 mr r9, r4 /* Save copy of Global Data pointer */
450 mr r10, r5 /* Save copy of Destination Address */
453 mr r3, r5 /* Destination Address */
454 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
455 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
456 lwz r5, GOT(__init_end)
458 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
463 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
469 /* First our own GOT */
471 /* then the one used by the C code */
481 beq cr1,4f /* In place copy is not necessary */
482 beq 7f /* Protect against 0 count */
501 * Now flush the cache: note that we must start from a cache aligned
502 * address. Otherwise we might miss one cache line.
506 beq 7f /* Always flush prefetch queue in any case */
514 sync /* Wait for all dcbst to complete on bus */
520 7: sync /* Wait for all icbi to complete on bus */
524 * We are done. Do not return, instead branch to second part of board
525 * initialization, now running from RAM.
528 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
535 * Relocation Function, r12 point to got2+0x8000
537 * Adjust got2 pointers, no need to check for 0, this code
538 * already puts a few entries in the table.
540 li r0,__got2_entries@sectoff@l
541 la r3,GOT(_GOT2_TABLE_)
542 lwz r11,GOT(_GOT2_TABLE_)
554 * Now adjust the fixups and the pointers to the fixups
555 * in case we need to move ourselves again.
557 li r0,__fixup_entries@sectoff@l
558 lwz r3,GOT(_FIXUP_TABLE_)
574 * Now clear BSS segment
576 lwz r3,GOT(__bss_start)
577 lwz r4,GOT(__bss_end)
590 mr r3, r9 /* Global Data pointer */
591 mr r4, r10 /* Destination Address */
595 * Copy exception vector code to low memory
598 * r7: source address, r8: end address, r9: target address
602 mflr r4 /* save link register */
605 lwz r8, GOT(_end_of_vectors)
607 li r9, 0x100 /* reset vector always at 0x100 */
610 bgelr /* return if r7>=r8 - just in case */
620 * relocate `hdlr' and `int_return' entries
622 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
623 li r8, Alignment - _start + EXC_OFF_SYS_RESET
626 addi r7, r7, 0x100 /* next exception vector */
630 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
633 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
636 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
637 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
640 addi r7, r7, 0x100 /* next exception vector */
644 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
645 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
648 addi r7, r7, 0x100 /* next exception vector */
652 mtlr r4 /* restore link register */