1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2004
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 #include <clock_legacy.h>
10 #include <asm/processor.h>
13 DECLARE_GLOBAL_DATA_PTR;
16 * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ
20 immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
21 uint sccr = in_be32(&immap->im_clkrst.car_sccr);
22 uint divider = 1 << (((sccr & SCCR_DFBRG11) >> 11) * 2);
25 * If for some reason measuring the gclk frequency won't
26 * work, we return the hardwired value.
27 * (For example, the cogent CMA286-60 CPU module has no
28 * separate oscillator for PITRTCLK)
30 gd->cpu_clk = CONFIG_8xx_GCLK_FREQ;
32 if ((sccr & SCCR_EBDF11) == 0) {
33 /* No Bus Divider active */
34 gd->bus_clk = gd->cpu_clk;
36 /* The MPC8xx has only one BDF: half clock speed */
37 gd->bus_clk = gd->cpu_clk / 2;
40 gd->arch.brg_clk = gd->cpu_clk / divider;