2 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #ifdef CONFIG_RESET_VECTOR_ADDRESS
10 #define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
12 #define RESET_VECTOR_ADDRESS 0xfffffffc
15 #ifndef CONFIG_SYS_MONITOR_LEN
16 #define CONFIG_SYS_MONITOR_LEN 0x80000
30 /* Read-only sections, merged into text segment: */
32 .interp : { *(.interp) }
41 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
44 /* Read-write section, merged into data segment: */
45 . = (. + 0x00FF) & 0xFFFFFF00;
47 PROVIDE (erotext = .);
53 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
57 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
58 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
72 KEEP(*(SORT(.u_boot_list*)));
76 __start___ex_table = .;
77 __ex_table : { *(__ex_table) }
78 __stop___ex_table = .;
82 .text.init : { *(.text.init) }
83 .data.init : { *(.data.init) }
87 #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
88 .bootpg ADDR(.text) - 0x1000 :
90 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
92 . = ADDR(.text) + CONFIG_SYS_MONITOR_LEN;
94 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
96 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
99 .resetvec RESET_VECTOR_ADDRESS :
104 . = RESET_VECTOR_ADDRESS + 0x4;
107 * Make sure that the bss segment isn't linked at 0x0, otherwise its
108 * address won't be updated during relocation fixups. Note that
109 * this is a temporary fix. Code to dynamically the fixup the bss
110 * location will be added in the future. When the bss relocation
111 * fixup code is present this workaround should be removed.
113 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)