1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
6 * Copyright 2009 Freescale Semiconductor, Inc.
12 #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
21 . = CONFIG_SPL_TEXT_BASE;
34 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
35 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
47 KEEP(*(SORT(.u_boot_list*)));
51 __start___ex_table = .;
52 __ex_table : { *(__ex_table) }
53 __stop___ex_table = .;
58 #ifdef CONFIG_SPL_SKIP_RELOCATE
69 /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
70 #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
71 .bootpg ADDR(.text) - 0x1000 :
76 #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
77 #ifndef BOOT_PAGE_OFFSET
78 #define BOOT_PAGE_OFFSET 0x1000
80 .bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
82 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
84 #ifndef RESET_VECTOR_OFFSET
85 #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
87 #elif defined(CONFIG_FSL_ELBC)
88 #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
90 #error unknown NAND controller
92 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
97 #ifndef CONFIG_SPL_SKIP_RELOCATE
99 * Make sure that the bss segment isn't linked at 0x0, otherwise its
100 * address won't be updated during relocation fixups.