2 * Copyright 2009 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/processor.h>
9 #include <asm/global_data.h>
13 DECLARE_GLOBAL_DATA_PTR;
17 #ifdef CONFIG_SYS_INIT_L2_ADDR
18 ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
20 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
22 /* set MBECCDIS=1, SBECCDIS=1 */
23 out_be32(&l2cache->l2errdis,
24 (MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
26 /* set L2E=1 & L2SRAM=001 */
27 out_be32(&l2cache->l2ctl,
28 (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
32 #ifndef CONFIG_SYS_FSL_TBCLK_DIV
33 #define CONFIG_SYS_FSL_TBCLK_DIV 8
36 void udelay(unsigned long usec)
38 u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000);
39 u32 ticks = ticks_per_usec * usec;
40 u32 s = mfspr(SPRN_TBRL);
42 while ((mfspr(SPRN_TBRL) - s) < ticks);