2 * Copyright (C) 2006 Freescale Semiconductor, Inc.
4 * Dave Liu <daveliu@freescale.com>
5 * based on source code of Shlomi Gridish
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/errno.h>
13 #include <asm/immap_85xx.h>
15 #if defined(CONFIG_QE) && !defined(CONFIG_U_QE)
16 #define NUM_OF_PINS 32
17 void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
24 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
25 volatile par_io_t *par_io = (volatile par_io_t *)
28 /* Caculate pin location and 2bit mask and dir */
29 pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
30 pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
32 /* Setup the direction */
33 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \
34 in_be32(&par_io[port].cpdir2) :
35 in_be32(&par_io[port].cpdir1);
37 if (pin > (NUM_OF_PINS/2) -1) {
38 out_be32(&par_io[port].cpdir2, ~pin_2bit_mask & tmp_val);
39 out_be32(&par_io[port].cpdir2, pin_2bit_dir | tmp_val);
41 out_be32(&par_io[port].cpdir1, ~pin_2bit_mask & tmp_val);
42 out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val);
45 /* Calculate pin location for 1bit mask */
46 pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1)));
48 /* Setup the open drain */
49 tmp_val = in_be32(&par_io[port].cpodr);
51 out_be32(&par_io[port].cpodr, pin_1bit_mask | tmp_val);
53 out_be32(&par_io[port].cpodr, ~pin_1bit_mask & tmp_val);
55 /* Setup the assignment */
56 tmp_val = (pin > (NUM_OF_PINS/2) - 1) ?
57 in_be32(&par_io[port].cppar2):
58 in_be32(&par_io[port].cppar1);
59 pin_2bit_assign = (u32)(assign
60 << (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2));
62 /* Clear and set 2 bits mask */
63 if (pin > (NUM_OF_PINS/2) - 1) {
64 out_be32(&par_io[port].cppar2, ~pin_2bit_mask & tmp_val);
65 out_be32(&par_io[port].cppar2, pin_2bit_assign | tmp_val);
67 out_be32(&par_io[port].cppar1, ~pin_2bit_mask & tmp_val);
68 out_be32(&par_io[port].cppar1, pin_2bit_assign | tmp_val);
72 #endif /* CONFIG_QE */