2 * Copyright 2010 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_85xx.h>
11 #include <asm/fsl_serdes.h>
13 #define SRDS1_MAX_LANES 8
15 static u32 serdes1_prtcl_map;
17 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
18 [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
19 [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
20 [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
21 [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
22 [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
23 [0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
24 [0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
25 [0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
26 [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
29 int is_serdes_configured(enum srds_prtcl prtcl)
31 return (1 << prtcl) & serdes1_prtcl_map;
34 void fsl_serdes_init(void)
36 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
37 u32 pordevsr = in_be32(&gur->pordevsr);
38 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
39 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
42 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
44 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
45 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
49 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
50 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
51 serdes1_prtcl_map |= (1 << lane_prtcl);
54 if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
55 serdes1_prtcl_map |= (1 << SGMII_TSEC1);
57 if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
58 serdes1_prtcl_map |= (1 << SGMII_TSEC2);
60 if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
61 serdes1_prtcl_map |= (1 << SGMII_TSEC3);
63 if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
64 serdes1_prtcl_map |= (1 << SGMII_TSEC4);