2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
6 * SPDX-License-Identifier: GPL-2.0+
9 /* U-Boot - Startup Code for PowerPC based Embedded Boards
12 * The processor starts at 0x00000100 and the code is executed
13 * from flash. The code is organized to be at an other address
14 * in memory, but as long we don't jump around before relocating.
15 * board_init lies at a quite high address and when the cpu has
16 * jumped there, everything is ok.
17 * This works because the cpu gives the FLASH (CS0) the whole
18 * address space at startup, and board_init lies as a echo of
19 * the flash somewhere up there in the memorymap.
21 * board_init will change CS0 to be positioned at the correct
22 * address and (s)dram will be positioned at address 0
24 #include <asm-offsets.h>
29 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
31 #include <ppc_asm.tmpl>
34 #include <asm/cache.h>
36 #include <asm/u-boot.h>
38 /* We don't want the MMU yet.
41 /* FP, Machine Check and Recoverable Interr. */
42 #define MSR_KERNEL ( MSR_FP | MSR_ME | MSR_RI )
45 * Set up GOT: Global Offset Table
47 * Use r12 to access the GOT
50 GOT_ENTRY(_GOT2_TABLE_)
51 GOT_ENTRY(_FIXUP_TABLE_)
54 GOT_ENTRY(_start_of_vectors)
55 GOT_ENTRY(_end_of_vectors)
56 GOT_ENTRY(transfer_to_handler)
60 GOT_ENTRY(__bss_start)
61 #if defined(CONFIG_FADS)
62 GOT_ENTRY(environment)
67 * r3 - 1st arg to board_init(): IMMP pointer
68 * r4 - 2nd arg to board_init(): boot flag
71 .long 0x27051956 /* U-Boot Magic Number */
74 .ascii U_BOOT_VERSION_STRING, "\0"
79 /* Initialize machine status; enable machine check interrupt */
80 /*----------------------------------------------------------------------*/
81 li r3, MSR_KERNEL /* Set FP, ME, RI flags */
83 mtspr SRR1, r3 /* Make SRR1 match MSR */
85 addis r0,0,0x0000 /* lets make sure that r0 is really 0 */
86 mtspr HID0, r0 /* disable I and D caches */
88 mfspr r3, ICR /* clear Interrupt Cause Register */
90 mfmsr r3 /* turn off address translation */
96 sync /* the MMU should be off... */
101 * Setup BATs - cannot be done in C since we don't have a stack yet
108 ori r3, r3, (MSR_IR | MSR_DR)
111 /* Enable and invalidate data cache.
115 ori r3, r3, HID0_DCE | HID0_DCI
122 /* Allocate Initial RAM in data cache.
124 lis r3, CONFIG_SYS_INIT_RAM_ADDR@h
125 ori r3, r3, CONFIG_SYS_INIT_RAM_ADDR@l
133 /* Lock way0 in data cache.
144 * Thisk the stack pointer *somewhere* sensible. Doesnt
145 * matter much where as we'll move it when we relocate
147 lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
148 ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
150 li r0, 0 /* Make room for stack frame header and */
151 stwu r0, -4(r1) /* clear final stack frame so that */
152 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
154 /* let the C-code set up the rest */
156 /* Be careful to keep code relocatable ! */
157 /*----------------------------------------------------------------------*/
159 GET_GOT /* initialize GOT access */
162 bl cpu_init_f /* run low-level CPU init code (from Flash) */
164 bl board_init_f /* run 1st part of board init code (from Flash) */
166 /* NOTREACHED - board_init_f() does not return */
169 .globl _start_of_vectors
173 STD_EXCEPTION(EXC_OFF_MACH_CHCK, MachineCheck, MachineCheckException)
175 /* Data Storage exception. "Never" generated on the 860. */
176 STD_EXCEPTION(EXC_OFF_DATA_STOR, DataStorage, UnknownException)
178 /* Instruction Storage exception. "Never" generated on the 860. */
179 STD_EXCEPTION(EXC_OFF_INS_STOR, InstStorage, UnknownException)
181 /* External Interrupt exception. */
182 STD_EXCEPTION(EXC_OFF_EXTERNAL, ExtInterrupt, external_interrupt)
184 /* Alignment exception. */
187 EXCEPTION_PROLOG(SRR0, SRR1)
192 addi r3,r1,STACK_FRAME_OVERHEAD
193 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
195 /* Program check exception */
198 EXCEPTION_PROLOG(SRR0, SRR1)
199 addi r3,r1,STACK_FRAME_OVERHEAD
200 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
203 /* No FPU on MPC8xx. This exception is not supposed to happen.
205 STD_EXCEPTION(EXC_OFF_FPUNAVAIL, FPUnavailable, UnknownException)
207 /* I guess we could implement decrementer, and may have
208 * to someday for timekeeping.
210 STD_EXCEPTION(EXC_OFF_DECR, Decrementer, timer_interrupt)
211 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
212 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
213 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
215 STD_EXCEPTION(EXC_OFF_TRACE, SingleStep, UnknownException)
217 STD_EXCEPTION(EXC_OFF_FPUNASSIST, Trap_0e, UnknownException)
218 STD_EXCEPTION(EXC_OFF_PMI, Trap_0f, UnknownException)
220 STD_EXCEPTION(EXC_OFF_ITME, InstructionTransMiss, UnknownException)
221 STD_EXCEPTION(EXC_OFF_DLTME, DataLoadTransMiss, UnknownException)
222 STD_EXCEPTION(EXC_OFF_DSTME, DataStoreTransMiss, UnknownException)
223 STD_EXCEPTION(EXC_OFF_IABE, InstructionBreakpoint, DebugException)
224 STD_EXCEPTION(EXC_OFF_SMIE, SysManageInt, UnknownException)
225 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
226 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
227 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
228 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
229 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
230 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
231 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
232 STD_EXCEPTION(0x1c00, ReservedC, UnknownException)
233 STD_EXCEPTION(0x1d00, ReservedD, UnknownException)
234 STD_EXCEPTION(0x1e00, ReservedE, UnknownException)
235 STD_EXCEPTION(0x1f00, ReservedF, UnknownException)
237 STD_EXCEPTION(EXC_OFF_RMTE, RunModeTrace, UnknownException)
239 .globl _end_of_vectors
246 * This code finishes saving the registers to the exception frame
247 * and jumps to the appropriate handler for the exception.
248 * Register r21 is pointer into trap frame, r1 has new stack pointer.
250 .globl transfer_to_handler
262 mfspr r23,SPRG3 /* if from user, fix up tss.regs */
264 addi r24,r1,STACK_FRAME_OVERHEAD
266 2: addi r2,r23,-TSS /* set r2 to current */
270 andi. r24,r23,0x3f00 /* get vector offset */
274 mtspr SPRG2,r22 /* r1 is now kernel sp */
276 addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */
280 bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */
282 lwz r24,0(r23) /* virtual address of handler */
283 lwz r23,4(r23) /* where to go when done */
285 ori r20,r20,0x30 /* enable IR, DR */
289 rfi /* jump to handler, enable MMU */
292 mfmsr r28 /* Disable interrupts */
296 SYNC /* Some chip revs need this... */
311 lwz r2,_NIP(r1) /* Restore environment */
325 mfspr r5,HID0 /* turn on the I cache. */
326 ori r5,r5,0x8800 /* Instruction cache only! */
329 and r6,r5,r6 /* clear the invalidate bit */
337 .globl icache_disable
352 srwi r3, r3, 15 /* >>15 & 1=> select bit 16 */
358 mfspr r5,HID0 /* turn on the D cache. */
359 ori r5,r5,0x4400 /* Data cache only! */
360 mfspr r4, PVR /* read PVR */
361 srawi r3, r4, 16 /* shift off the least 16 bits */
362 cmpi 0, 0, r3, 0xC /* Check for Max pvr */
364 ori r5,r5,0x0040 /* setting the DCFA bit, for Max rev 1 errata */
368 and r6,r5,r6 /* clear the invalidate bit */
376 .globl dcache_disable
391 srwi r3, r3, 14 /* >>14 & 1=> select bit 17 */
397 /*TODO : who uses this, what should it do?
408 /*------------------------------------------------------------------------------*/
411 * void relocate_code (addr_sp, gd, addr_moni)
413 * This "function" does not return, instead it continues in RAM
414 * after relocating the monitor code.
418 * r5 = length in bytes
424 mr r1, r3 /* Set new stack pointer */
425 mr r9, r4 /* Save copy of Global Data pointer */
426 mr r10, r5 /* Save copy of Destination Address */
429 mr r3, r5 /* Destination Address */
430 #ifdef CONFIG_SYS_RAMBOOT
431 lis r4, CONFIG_SYS_SDRAM_BASE@h /* Source Address */
432 ori r4, r4, CONFIG_SYS_SDRAM_BASE@l
434 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
435 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
437 lwz r5, GOT(__init_end)
439 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
444 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
450 /* First our own GOT */
452 /* the the one used by the C code */
462 beq cr1,4f /* In place copy is not necessary */
463 beq 7f /* Protect against 0 count */
482 /* Unlock the data cache and invalidate locked area */
485 lis r4, CONFIG_SYS_INIT_RAM_ADDR@h
486 ori r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
495 * Now flush the cache: note that we must start from a cache aligned
496 * address. Otherwise we might miss one cache line.
500 beq 7f /* Always flush prefetch queue in any case */
508 sync /* Wait for all dcbst to complete on bus */
514 7: sync /* Wait for all icbi to complete on bus */
518 * We are done. Do not return, instead branch to second part of board
519 * initialization, now running from RAM.
522 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
529 * Relocation Function, r12 point to got2+0x8000
531 * Adjust got2 pointers, no need to check for 0, this code
532 * already puts a few entries in the table.
534 li r0,__got2_entries@sectoff@l
535 la r3,GOT(_GOT2_TABLE_)
536 lwz r11,GOT(_GOT2_TABLE_)
548 * Now adjust the fixups and the pointers to the fixups
549 * in case we need to move ourselves again.
551 li r0,__fixup_entries@sectoff@l
552 lwz r3,GOT(_FIXUP_TABLE_)
568 * Now clear BSS segment
570 lwz r3,GOT(__bss_start)
571 lwz r4,GOT(__bss_end)
584 mr r3, r9 /* Global Data pointer */
585 mr r4, r10 /* Destination Address */
589 * Copy exception vector code to low memory
592 * r7: source address, r8: end address, r9: target address
596 mflr r4 /* save link register */
599 lwz r8, GOT(_end_of_vectors)
601 li r9, 0x100 /* reset vector always at 0x100 */
604 bgelr /* return if r7>=r8 - just in case */
614 * relocate `hdlr' and `int_return' entries
616 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
617 li r8, Alignment - _start + EXC_OFF_SYS_RESET
620 addi r7, r7, 0x100 /* next exception vector */
624 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
627 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
630 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
631 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
634 addi r7, r7, 0x100 /* next exception vector */
638 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
639 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
642 addi r7, r7, 0x100 /* next exception vector */
646 mtlr r4 /* restore link register */
649 /* Setup the BAT registers.
652 lis r4, CONFIG_SYS_IBAT0L@h
653 ori r4, r4, CONFIG_SYS_IBAT0L@l
654 lis r3, CONFIG_SYS_IBAT0U@h
655 ori r3, r3, CONFIG_SYS_IBAT0U@l
660 lis r4, CONFIG_SYS_DBAT0L@h
661 ori r4, r4, CONFIG_SYS_DBAT0L@l
662 lis r3, CONFIG_SYS_DBAT0U@h
663 ori r3, r3, CONFIG_SYS_DBAT0U@l
668 lis r4, CONFIG_SYS_IBAT1L@h
669 ori r4, r4, CONFIG_SYS_IBAT1L@l
670 lis r3, CONFIG_SYS_IBAT1U@h
671 ori r3, r3, CONFIG_SYS_IBAT1U@l
676 lis r4, CONFIG_SYS_DBAT1L@h
677 ori r4, r4, CONFIG_SYS_DBAT1L@l
678 lis r3, CONFIG_SYS_DBAT1U@h
679 ori r3, r3, CONFIG_SYS_DBAT1U@l
684 lis r4, CONFIG_SYS_IBAT2L@h
685 ori r4, r4, CONFIG_SYS_IBAT2L@l
686 lis r3, CONFIG_SYS_IBAT2U@h
687 ori r3, r3, CONFIG_SYS_IBAT2U@l
692 lis r4, CONFIG_SYS_DBAT2L@h
693 ori r4, r4, CONFIG_SYS_DBAT2L@l
694 lis r3, CONFIG_SYS_DBAT2U@h
695 ori r3, r3, CONFIG_SYS_DBAT2U@l
700 lis r4, CONFIG_SYS_IBAT3L@h
701 ori r4, r4, CONFIG_SYS_IBAT3L@l
702 lis r3, CONFIG_SYS_IBAT3U@h
703 ori r3, r3, CONFIG_SYS_IBAT3U@l
708 lis r4, CONFIG_SYS_DBAT3L@h
709 ori r4, r4, CONFIG_SYS_DBAT3L@l
710 lis r3, CONFIG_SYS_DBAT3U@h
711 ori r3, r3, CONFIG_SYS_DBAT3U@l
717 * -> for (val = 0; val < 0x20000; val+=0x1000)