3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
10 DECLARE_GLOBAL_DATA_PTR;
12 #ifdef CONFIG_HARD_I2C
17 #if !defined(CONFIG_I2C_MULTI_BUS)
18 #if (CONFIG_SYS_I2C_MODULE == 2)
19 #define I2C_BASE MPC5XXX_I2C2
20 #elif (CONFIG_SYS_I2C_MODULE == 1)
21 #define I2C_BASE MPC5XXX_I2C1
23 #error CONFIG_SYS_I2C_MODULE is not properly configured
26 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
27 CONFIG_SYS_SPD_BUS_NUM;
28 static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,
29 CONFIG_SYS_I2C_SPEED};
31 static const unsigned long i2c_dev[2] = {
36 #define I2C_BASE ((struct mpc5xxx_i2c *)i2c_dev[i2c_bus_num])
39 #define I2C_TIMEOUT 6667
42 struct mpc5xxx_i2c_tap {
47 static int mpc_reg_in (volatile u32 *reg);
48 static void mpc_reg_out (volatile u32 *reg, int val, int mask);
49 static int wait_for_bb (void);
50 static int wait_for_pin (int *status);
51 static int do_address (uchar chip, char rdwr_flag);
52 static int send_bytes (uchar chip, char *buf, int len);
53 static int receive_bytes (uchar chip, char *buf, int len);
54 static int mpc_get_fdr (int);
56 static int mpc_reg_in(volatile u32 *reg)
59 __asm__ __volatile__ ("eieio");
63 static void mpc_reg_out(volatile u32 *reg, int val, int mask)
70 tmp = mpc_reg_in(reg);
71 *reg = ((tmp & ~mask) | (val & mask)) << 24;
73 __asm__ __volatile__ ("eieio");
78 static int wait_for_bb(void)
80 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
81 int timeout = I2C_TIMEOUT;
84 status = mpc_reg_in(®s->msr);
86 while (timeout-- && (status & I2C_BB)) {
87 mpc_reg_out(®s->mcr, I2C_STA, I2C_STA);
88 (void)mpc_reg_in(®s->mdr);
89 mpc_reg_out(®s->mcr, 0, I2C_STA);
90 mpc_reg_out(®s->mcr, 0, 0);
91 mpc_reg_out(®s->mcr, I2C_EN, 0);
93 status = mpc_reg_in(®s->msr);
96 return (status & I2C_BB);
99 static int wait_for_pin(int *status)
101 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
102 int timeout = I2C_TIMEOUT;
104 *status = mpc_reg_in(®s->msr);
106 while (timeout-- && !(*status & I2C_IF)) {
108 *status = mpc_reg_in(®s->msr);
111 if (!(*status & I2C_IF)) {
115 mpc_reg_out(®s->msr, 0, I2C_IF);
120 static int do_address(uchar chip, char rdwr_flag)
122 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
131 mpc_reg_out(®s->mcr, I2C_TX, I2C_TX);
132 mpc_reg_out(®s->mdr, chip, 0);
134 if (wait_for_pin(&status)) {
138 if (status & I2C_RXAK) {
145 static int send_bytes(uchar chip, char *buf, int len)
147 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
151 for (wrcount = 0; wrcount < len; ++wrcount) {
153 mpc_reg_out(®s->mdr, buf[wrcount], 0);
155 if (wait_for_pin(&status)) {
159 if (status & I2C_RXAK) {
165 return !(wrcount == len);
168 static int receive_bytes(uchar chip, char *buf, int len)
170 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
176 mpc_reg_out(®s->mcr, 0, I2C_TX);
178 for (i = 0; i < len; ++i) {
179 buf[rdcount] = mpc_reg_in(®s->mdr);
188 if (wait_for_pin(&status)) {
193 mpc_reg_out(®s->mcr, I2C_TXAK, I2C_TXAK);
194 buf[rdcount++] = mpc_reg_in(®s->mdr);
196 if (wait_for_pin(&status)) {
200 mpc_reg_out(®s->mcr, 0, I2C_TXAK);
205 #if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
207 #define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
208 #define FDR432(x) (u8) ((x & 0x1C) >> 2)
210 * Reset any i2c devices that may have been interrupted during a system reset.
211 * Normally this would be accomplished by clocking the line until SCL and SDA
212 * are released and then sending a start condtiion (From an Atmel datasheet).
213 * There is no direct access to the i2c pins so instead create start commands
214 * through the i2c interface. Send a start command then delay for the SDA Hold
215 * time, repeat this by disabling/enabling the bus a total of 9 times.
217 static void send_reset(void)
219 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
223 int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
224 struct mpc5xxx_i2c_tap scltap[] = {
235 fdr = (u8)mpc_reg_in(®s->mfdr);
237 delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
238 scltap[FDR432(fdr)].tap2tap) + 3;
240 for (i = 0; i < 9; i++) {
241 mpc_reg_out(®s->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
243 mpc_reg_out(®s->mcr, 0, I2C_INIT_MASK);
247 mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK);
249 #endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
251 /**************** I2C API ****************/
253 void i2c_init(int speed, int saddr)
255 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
257 mpc_reg_out(®s->mcr, 0, 0);
258 mpc_reg_out(®s->madr, saddr << 1, 0);
262 mpc_reg_out(®s->mfdr, mpc_get_fdr(speed), 0);
266 mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK);
267 mpc_reg_out(®s->msr, 0, I2C_IF);
269 #if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
275 static int mpc_get_fdr(int speed)
280 ulong best_speed = 0;
283 ulong bestmatch = 0xffffffffUL;
284 int best_i = 0, best_j = 0, i, j;
285 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
286 struct mpc5xxx_i2c_tap scltap[] = {
297 ipb = gd->arch.ipb_clk;
298 for (i = 7; i >= 0; i--) {
299 for (j = 7; j >= 0; j--) {
300 scl = 2 * (scltap[j].scl2tap +
301 (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
302 if (ipb <= speed*scl) {
303 if ((speed*scl - ipb) < bestmatch) {
304 bestmatch = speed*scl - ipb;
307 best_speed = ipb/scl;
312 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
313 if (gd->flags & GD_FLG_RELOC) {
316 printf("%ld kHz, ", best_speed / 1000);
324 int i2c_probe(uchar chip)
326 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
329 for (i = 0; i < I2C_RETRIES; i++) {
330 mpc_reg_out(®s->mcr, I2C_STA, I2C_STA);
332 if (! do_address(chip, 0)) {
333 mpc_reg_out(®s->mcr, 0, I2C_STA);
338 mpc_reg_out(®s->mcr, 0, I2C_STA);
342 return (i == I2C_RETRIES);
345 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
348 struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
351 xaddr[0] = (addr >> 24) & 0xFF;
352 xaddr[1] = (addr >> 16) & 0xFF;
353 xaddr[2] = (addr >> 8) & 0xFF;
354 xaddr[3] = addr & 0xFF;
357 printf("i2c_read: bus is busy\n");
361 mpc_reg_out(®s->mcr, I2C_STA, I2C_STA);
362 if (do_address(chip, 0)) {
363 printf("i2c_read: failed to address chip\n");
367 if (send_bytes(chip, &xaddr[4-alen], alen)) {
368 printf("i2c_read: send_bytes failed\n");
372 mpc_reg_out(®s->mcr, I2C_RSTA, I2C_RSTA);
373 if (do_address(chip, 1)) {
374 printf("i2c_read: failed to address chip\n");
378 if (receive_bytes(chip, (char *)buf, len)) {
379 printf("i2c_read: receive_bytes failed\n");
385 mpc_reg_out(®s->mcr, 0, I2C_STA);
389 int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
392 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
395 xaddr[0] = (addr >> 24) & 0xFF;
396 xaddr[1] = (addr >> 16) & 0xFF;
397 xaddr[2] = (addr >> 8) & 0xFF;
398 xaddr[3] = addr & 0xFF;
401 printf("i2c_write: bus is busy\n");
405 mpc_reg_out(®s->mcr, I2C_STA, I2C_STA);
406 if (do_address(chip, 0)) {
407 printf("i2c_write: failed to address chip\n");
411 if (send_bytes(chip, &xaddr[4-alen], alen)) {
412 printf("i2c_write: send_bytes failed\n");
416 if (send_bytes(chip, (char *)buf, len)) {
417 printf("i2c_write: send_bytes failed\n");
423 mpc_reg_out(®s->mcr, 0, I2C_STA);
427 #if defined(CONFIG_I2C_MULTI_BUS)
428 int i2c_set_bus_num(unsigned int bus)
434 i2c_init(i2c_bus_speed[bus], CONFIG_SYS_I2C_SLAVE);
438 int i2c_set_bus_speed(unsigned int speed)
440 i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
444 unsigned int i2c_get_bus_num(void)
449 unsigned int i2c_get_bus_speed(void)
451 return i2c_bus_speed[i2c_bus_num];
456 #endif /* CONFIG_HARD_I2C */