2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
5 * Copyright (C) 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * Discription: startup code
35 #include <timestamp.h>
38 #define CONFIG_5xx 1 /* needed for Linux kernel header files */
39 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
41 #include <ppc_asm.tmpl>
44 #include <linux/config.h>
45 #include <asm/processor.h>
46 #include <asm/u-boot.h>
48 #ifndef CONFIG_IDENT_STRING
49 #define CONFIG_IDENT_STRING ""
52 /* We don't have a MMU.
55 #define MSR_KERNEL ( MSR_ME | MSR_RI ) /* Machine Check and Recoverable Interr. */
58 * Set up GOT: Global Offset Table
60 * Use r12 to access the GOT
63 GOT_ENTRY(_GOT2_TABLE_)
64 GOT_ENTRY(_FIXUP_TABLE_)
67 GOT_ENTRY(_start_of_vectors)
68 GOT_ENTRY(_end_of_vectors)
69 GOT_ENTRY(transfer_to_handler)
73 GOT_ENTRY(__bss_start)
77 * r3 - 1st arg to board_init(): IMMP pointer
78 * r4 - 2nd arg to board_init(): boot flag
81 .long 0x27051956 /* U-Boot Magic Number */
85 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
86 .ascii CONFIG_IDENT_STRING, "\0"
92 li r4, CONFIG_SYS_ISB /* Set ISB bit */
96 /* Initialize machine status; enable machine check interrupt */
97 /*----------------------------------------------------------------------*/
98 li r3, MSR_KERNEL /* Set ME, RI flags */
100 mtspr SRR1, r3 /* Make SRR1 match MSR */
102 /* Initialize debug port registers */
103 /*----------------------------------------------------------------------*/
104 xor r0, r0, r0 /* Clear R0 */
105 mtspr LCTRL1, r0 /* Initialize debug port regs */
110 #if defined(CONFIG_PATI)
111 /* the external flash access on PATI fails if programming the PLL to 40MHz.
112 * Copy the PLL programming code to the internal RAM and execute it
113 *----------------------------------------------------------------------*/
114 lis r3, CONFIG_SYS_MONITOR_BASE@h
115 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
116 addi r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET
118 lis r4, CONFIG_SYS_INIT_RAM_ADDR@h
119 ori r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
122 ori r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2)
129 bdnz 0b /* copy loop */
134 * Calculate absolute address in FLASH and jump there
135 *----------------------------------------------------------------------*/
137 lis r3, CONFIG_SYS_MONITOR_BASE@h
138 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
139 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
145 /* Initialize some SPRs that are hard to access from C */
146 /*----------------------------------------------------------------------*/
148 lis r3, CONFIG_SYS_IMMR@h /* Pass IMMR as arg1 to C routine */
149 lis r2, CONFIG_SYS_INIT_SP_ADDR@h
150 ori r1, r2, CONFIG_SYS_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */
151 /* Note: R0 is still 0 here */
152 stwu r0, -4(r1) /* Clear final stack frame so that */
153 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
156 * Disable serialized ifetch and show cycles
157 * (i.e. set processor to normal mode) for maximum
164 /* Set up debug mode entry */
166 lis r2, CONFIG_SYS_DER@h
167 ori r2, r2, CONFIG_SYS_DER@l
170 /* Let the C-code set up the rest */
172 /* Be careful to keep code relocatable ! */
173 /*----------------------------------------------------------------------*/
175 GET_GOT /* initialize GOT access */
178 bl cpu_init_f /* run low-level CPU init code (from Flash) */
180 bl board_init_f /* run 1st part of board init code (from Flash) */
182 /* NOTREACHED - board_init_f() does not return */
185 .globl _start_of_vectors
189 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
191 /* Data Storage exception. "Never" generated on the 860. */
192 STD_EXCEPTION(0x300, DataStorage, UnknownException)
194 /* Instruction Storage exception. "Never" generated on the 860. */
195 STD_EXCEPTION(0x400, InstStorage, UnknownException)
197 /* External Interrupt exception. */
198 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
200 /* Alignment exception. */
203 EXCEPTION_PROLOG(SRR0, SRR1)
208 addi r3,r1,STACK_FRAME_OVERHEAD
209 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
211 /* Program check exception */
214 EXCEPTION_PROLOG(SRR0, SRR1)
215 addi r3,r1,STACK_FRAME_OVERHEAD
216 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
219 /* FPU on MPC5xx available. We will use it later.
221 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
223 /* I guess we could implement decrementer, and may have
224 * to someday for timekeeping.
226 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
227 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
228 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
229 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
230 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
232 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
233 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
235 /* On the MPC8xx, this is a software emulation interrupt. It occurs
236 * for all unimplemented and illegal instructions.
238 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
239 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
240 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
241 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
242 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
244 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
245 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
246 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
247 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
248 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
249 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
250 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
252 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
253 STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
254 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
255 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
258 .globl _end_of_vectors
265 * This code finishes saving the registers to the exception frame
266 * and jumps to the appropriate handler for the exception.
267 * Register r21 is pointer into trap frame, r1 has new stack pointer.
269 .globl transfer_to_handler
280 andi. r24,r23,0x3f00 /* get vector offset */
284 mtspr SPRG2,r22 /* r1 is now kernel sp */
285 lwz r24,0(r23) /* virtual address of handler */
286 lwz r23,4(r23) /* where to go when done */
291 rfi /* jump to handler, enable MMU */
294 mfmsr r28 /* Disable interrupts */
298 SYNC /* Some chip revs need this... */
313 lwz r2,_NIP(r1) /* Restore environment */
325 * unsigned int get_immr (unsigned int mask)
327 * return (mask ? (IMMR & mask) : IMMR);
331 mr r4,r3 /* save mask */
332 mfspr r3, IMMR /* IMMR */
333 cmpwi 0,r4,0 /* mask != 0 ? */
335 and r3,r3,r4 /* IMMR & mask */
345 /*------------------------------------------------------------------------------*/
348 * void relocate_code (addr_sp, gd, addr_moni)
350 * This "function" does not return, instead it continues in RAM
351 * after relocating the monitor code.
355 * r5 = length in bytes
360 mr r1, r3 /* Set new stack pointer in SRAM */
361 mr r9, r4 /* Save copy of global data pointer in SRAM */
362 mr r10, r5 /* Save copy of monitor destination Address in SRAM */
365 mr r3, r5 /* Destination Address */
366 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
367 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
368 lwz r5, GOT(__init_end)
374 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
380 /* First our own GOT */
382 /* the the one used by the C code */
392 beq cr1,4f /* In place copy is not necessary */
393 beq 4f /* Protect against 0 count */
415 * We are done. Do not return, instead branch to second part of board
416 * initialization, now running from RAM.
419 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
426 * Relocation Function, r12 point to got2+0x8000
428 * Adjust got2 pointers, no need to check for 0, this code
429 * already puts a few entries in the table.
431 li r0,__got2_entries@sectoff@l
432 la r3,GOT(_GOT2_TABLE_)
433 lwz r11,GOT(_GOT2_TABLE_)
445 * Now adjust the fixups and the pointers to the fixups
446 * in case we need to move ourselves again.
448 li r0,__fixup_entries@sectoff@l
449 lwz r3,GOT(_FIXUP_TABLE_)
463 * Now clear BSS segment
465 lwz r3,GOT(__bss_start)
478 mr r3, r9 /* Global Data pointer */
479 mr r4, r10 /* Destination Address */
483 * Copy exception vector code to low memory
486 * r7: source address, r8: end address, r9: target address
490 mflr r4 /* save link register */
493 lwz r8, GOT(_end_of_vectors)
495 li r9, 0x100 /* reset vector always at 0x100 */
498 bgelr /* return if r7>=r8 - just in case */
508 * relocate `hdlr' and `int_return' entries
510 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
511 li r8, Alignment - _start + EXC_OFF_SYS_RESET
514 addi r7, r7, 0x100 /* next exception vector */
518 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
521 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
524 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
525 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
528 addi r7, r7, 0x100 /* next exception vector */
532 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
533 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
536 addi r7, r7, 0x100 /* next exception vector */
540 mtlr r4 /* restore link register */
543 #if defined(CONFIG_PATI)
544 /* Program the PLL */
546 lis r4, (CONFIG_SYS_IMMR + 0x002fc384)@h
547 ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l
548 lis r3, (0x55ccaa33)@h
549 ori r3, r3, (0x55ccaa33)@l
551 lis r4, (CONFIG_SYS_IMMR + 0x002fc284)@h
552 ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l
553 lis r3, CONFIG_SYS_PLPRCR@h
554 ori r3, r3, CONFIG_SYS_PLPRCR@l
560 bdnz ..spinlp /* spin loop */