2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
5 * Copyright (C) 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch.
7 * SPDX-License-Identifier: GPL-2.0+
13 * Discription: startup code
17 #include <asm-offsets.h>
22 #define CONFIG_5xx 1 /* needed for Linux kernel header files */
23 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
25 #include <ppc_asm.tmpl>
28 #include <linux/config.h>
29 #include <asm/processor.h>
30 #include <asm/u-boot.h>
32 /* We don't have a MMU.
35 #define MSR_KERNEL ( MSR_ME | MSR_RI ) /* Machine Check and Recoverable Interr. */
38 * Set up GOT: Global Offset Table
40 * Use r12 to access the GOT
43 GOT_ENTRY(_GOT2_TABLE_)
44 GOT_ENTRY(_FIXUP_TABLE_)
47 GOT_ENTRY(_start_of_vectors)
48 GOT_ENTRY(_end_of_vectors)
49 GOT_ENTRY(transfer_to_handler)
53 GOT_ENTRY(__bss_start)
57 * r3 - 1st arg to board_init(): IMMP pointer
58 * r4 - 2nd arg to board_init(): boot flag
61 .long 0x27051956 /* U-Boot Magic Number */
64 .ascii U_BOOT_VERSION_STRING, "\0"
70 li r4, CONFIG_SYS_ISB /* Set ISB bit */
74 /* Initialize machine status; enable machine check interrupt */
75 /*----------------------------------------------------------------------*/
76 li r3, MSR_KERNEL /* Set ME, RI flags */
78 mtspr SRR1, r3 /* Make SRR1 match MSR */
80 /* Initialize debug port registers */
81 /*----------------------------------------------------------------------*/
82 xor r0, r0, r0 /* Clear R0 */
83 mtspr LCTRL1, r0 /* Initialize debug port regs */
88 #if defined(CONFIG_PATI)
89 /* the external flash access on PATI fails if programming the PLL to 40MHz.
90 * Copy the PLL programming code to the internal RAM and execute it
91 *----------------------------------------------------------------------*/
92 lis r3, CONFIG_SYS_MONITOR_BASE@h
93 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
94 addi r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET
96 lis r4, CONFIG_SYS_INIT_RAM_ADDR@h
97 ori r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
100 ori r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2)
107 bdnz 0b /* copy loop */
112 * Calculate absolute address in FLASH and jump there
113 *----------------------------------------------------------------------*/
115 lis r3, CONFIG_SYS_MONITOR_BASE@h
116 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
117 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
123 /* Initialize some SPRs that are hard to access from C */
124 /*----------------------------------------------------------------------*/
126 lis r3, CONFIG_SYS_IMMR@h /* Pass IMMR as arg1 to C routine */
127 lis r2, CONFIG_SYS_INIT_SP_ADDR@h
128 ori r1, r2, CONFIG_SYS_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */
129 /* Note: R0 is still 0 here */
130 stwu r0, -4(r1) /* Clear final stack frame so that */
131 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
134 * Disable serialized ifetch and show cycles
135 * (i.e. set processor to normal mode) for maximum
142 /* Set up debug mode entry */
144 lis r2, CONFIG_SYS_DER@h
145 ori r2, r2, CONFIG_SYS_DER@l
148 /* Let the C-code set up the rest */
150 /* Be careful to keep code relocatable ! */
151 /*----------------------------------------------------------------------*/
153 GET_GOT /* initialize GOT access */
156 bl cpu_init_f /* run low-level CPU init code (from Flash) */
158 bl board_init_f /* run 1st part of board init code (from Flash) */
160 /* NOTREACHED - board_init_f() does not return */
163 .globl _start_of_vectors
167 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
169 /* Data Storage exception. "Never" generated on the 860. */
170 STD_EXCEPTION(0x300, DataStorage, UnknownException)
172 /* Instruction Storage exception. "Never" generated on the 860. */
173 STD_EXCEPTION(0x400, InstStorage, UnknownException)
175 /* External Interrupt exception. */
176 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
178 /* Alignment exception. */
181 EXCEPTION_PROLOG(SRR0, SRR1)
186 addi r3,r1,STACK_FRAME_OVERHEAD
187 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
189 /* Program check exception */
192 EXCEPTION_PROLOG(SRR0, SRR1)
193 addi r3,r1,STACK_FRAME_OVERHEAD
194 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
197 /* FPU on MPC5xx available. We will use it later.
199 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
201 /* I guess we could implement decrementer, and may have
202 * to someday for timekeeping.
204 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
205 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
206 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
207 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
208 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
210 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
211 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
213 /* On the MPC8xx, this is a software emulation interrupt. It occurs
214 * for all unimplemented and illegal instructions.
216 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
217 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
218 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
219 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
220 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
222 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
223 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
224 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
225 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
226 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
227 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
228 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
230 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
231 STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
232 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
233 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
236 .globl _end_of_vectors
243 * This code finishes saving the registers to the exception frame
244 * and jumps to the appropriate handler for the exception.
245 * Register r21 is pointer into trap frame, r1 has new stack pointer.
247 .globl transfer_to_handler
258 andi. r24,r23,0x3f00 /* get vector offset */
262 mtspr SPRG2,r22 /* r1 is now kernel sp */
263 lwz r24,0(r23) /* virtual address of handler */
264 lwz r23,4(r23) /* where to go when done */
269 rfi /* jump to handler, enable MMU */
272 mfmsr r28 /* Disable interrupts */
276 SYNC /* Some chip revs need this... */
291 lwz r2,_NIP(r1) /* Restore environment */
303 * unsigned int get_immr (unsigned int mask)
305 * return (mask ? (IMMR & mask) : IMMR);
309 mr r4,r3 /* save mask */
310 mfspr r3, IMMR /* IMMR */
311 cmpwi 0,r4,0 /* mask != 0 ? */
313 and r3,r3,r4 /* IMMR & mask */
323 /*------------------------------------------------------------------------------*/
326 * void relocate_code (addr_sp, gd, addr_moni)
328 * This "function" does not return, instead it continues in RAM
329 * after relocating the monitor code.
333 * r5 = length in bytes
338 mr r1, r3 /* Set new stack pointer in SRAM */
339 mr r9, r4 /* Save copy of global data pointer in SRAM */
340 mr r10, r5 /* Save copy of monitor destination Address in SRAM */
343 mr r3, r5 /* Destination Address */
344 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
345 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
346 lwz r5, GOT(__init_end)
352 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
358 /* First our own GOT */
360 /* the the one used by the C code */
370 beq cr1,4f /* In place copy is not necessary */
371 beq 4f /* Protect against 0 count */
393 * We are done. Do not return, instead branch to second part of board
394 * initialization, now running from RAM.
397 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
404 * Relocation Function, r12 point to got2+0x8000
406 * Adjust got2 pointers, no need to check for 0, this code
407 * already puts a few entries in the table.
409 li r0,__got2_entries@sectoff@l
410 la r3,GOT(_GOT2_TABLE_)
411 lwz r11,GOT(_GOT2_TABLE_)
423 * Now adjust the fixups and the pointers to the fixups
424 * in case we need to move ourselves again.
426 li r0,__fixup_entries@sectoff@l
427 lwz r3,GOT(_FIXUP_TABLE_)
443 * Now clear BSS segment
445 lwz r3,GOT(__bss_start)
446 lwz r4,GOT(__bss_end)
458 mr r3, r9 /* Global Data pointer */
459 mr r4, r10 /* Destination Address */
463 * Copy exception vector code to low memory
466 * r7: source address, r8: end address, r9: target address
470 mflr r4 /* save link register */
473 lwz r8, GOT(_end_of_vectors)
475 li r9, 0x100 /* reset vector always at 0x100 */
478 bgelr /* return if r7>=r8 - just in case */
488 * relocate `hdlr' and `int_return' entries
490 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
491 li r8, Alignment - _start + EXC_OFF_SYS_RESET
494 addi r7, r7, 0x100 /* next exception vector */
498 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
501 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
504 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
505 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
508 addi r7, r7, 0x100 /* next exception vector */
512 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
513 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
516 addi r7, r7, 0x100 /* next exception vector */
520 mtlr r4 /* restore link register */
523 #if defined(CONFIG_PATI)
524 /* Program the PLL */
526 lis r4, (CONFIG_SYS_IMMR + 0x002fc384)@h
527 ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l
528 lis r3, (0x55ccaa33)@h
529 ori r3, r3, (0x55ccaa33)@l
531 lis r4, (CONFIG_SYS_IMMR + 0x002fc284)@h
532 ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l
533 lis r3, CONFIG_SYS_PLPRCR@h
534 ori r3, r3, CONFIG_SYS_PLPRCR@l
540 bdnz ..spinlp /* spin loop */