2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
5 * Copyright (C) 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * Discription: startup code
33 #include <asm-offsets.h>
36 #include <timestamp.h>
39 #define CONFIG_5xx 1 /* needed for Linux kernel header files */
40 #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
42 #include <ppc_asm.tmpl>
45 #include <linux/config.h>
46 #include <asm/processor.h>
47 #include <asm/u-boot.h>
49 #ifndef CONFIG_IDENT_STRING
50 #define CONFIG_IDENT_STRING ""
53 /* We don't have a MMU.
56 #define MSR_KERNEL ( MSR_ME | MSR_RI ) /* Machine Check and Recoverable Interr. */
59 * Set up GOT: Global Offset Table
61 * Use r12 to access the GOT
64 GOT_ENTRY(_GOT2_TABLE_)
65 GOT_ENTRY(_FIXUP_TABLE_)
68 GOT_ENTRY(_start_of_vectors)
69 GOT_ENTRY(_end_of_vectors)
70 GOT_ENTRY(transfer_to_handler)
73 GOT_ENTRY(__bss_end__)
74 GOT_ENTRY(__bss_start)
78 * r3 - 1st arg to board_init(): IMMP pointer
79 * r4 - 2nd arg to board_init(): boot flag
82 .long 0x27051956 /* U-Boot Magic Number */
86 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
87 .ascii CONFIG_IDENT_STRING, "\0"
93 li r4, CONFIG_SYS_ISB /* Set ISB bit */
97 /* Initialize machine status; enable machine check interrupt */
98 /*----------------------------------------------------------------------*/
99 li r3, MSR_KERNEL /* Set ME, RI flags */
101 mtspr SRR1, r3 /* Make SRR1 match MSR */
103 /* Initialize debug port registers */
104 /*----------------------------------------------------------------------*/
105 xor r0, r0, r0 /* Clear R0 */
106 mtspr LCTRL1, r0 /* Initialize debug port regs */
111 #if defined(CONFIG_PATI)
112 /* the external flash access on PATI fails if programming the PLL to 40MHz.
113 * Copy the PLL programming code to the internal RAM and execute it
114 *----------------------------------------------------------------------*/
115 lis r3, CONFIG_SYS_MONITOR_BASE@h
116 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
117 addi r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET
119 lis r4, CONFIG_SYS_INIT_RAM_ADDR@h
120 ori r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
123 ori r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2)
130 bdnz 0b /* copy loop */
135 * Calculate absolute address in FLASH and jump there
136 *----------------------------------------------------------------------*/
138 lis r3, CONFIG_SYS_MONITOR_BASE@h
139 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
140 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
146 /* Initialize some SPRs that are hard to access from C */
147 /*----------------------------------------------------------------------*/
149 lis r3, CONFIG_SYS_IMMR@h /* Pass IMMR as arg1 to C routine */
150 lis r2, CONFIG_SYS_INIT_SP_ADDR@h
151 ori r1, r2, CONFIG_SYS_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */
152 /* Note: R0 is still 0 here */
153 stwu r0, -4(r1) /* Clear final stack frame so that */
154 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
157 * Disable serialized ifetch and show cycles
158 * (i.e. set processor to normal mode) for maximum
165 /* Set up debug mode entry */
167 lis r2, CONFIG_SYS_DER@h
168 ori r2, r2, CONFIG_SYS_DER@l
171 /* Let the C-code set up the rest */
173 /* Be careful to keep code relocatable ! */
174 /*----------------------------------------------------------------------*/
176 GET_GOT /* initialize GOT access */
177 #if defined(__pic__) && __pic__ == 1
178 /* Needed for upcoming -msingle-pic-base */
179 bl _GLOBAL_OFFSET_TABLE_@local-4
183 bl cpu_init_f /* run low-level CPU init code (from Flash) */
185 bl board_init_f /* run 1st part of board init code (from Flash) */
187 /* NOTREACHED - board_init_f() does not return */
190 .globl _start_of_vectors
194 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
196 /* Data Storage exception. "Never" generated on the 860. */
197 STD_EXCEPTION(0x300, DataStorage, UnknownException)
199 /* Instruction Storage exception. "Never" generated on the 860. */
200 STD_EXCEPTION(0x400, InstStorage, UnknownException)
202 /* External Interrupt exception. */
203 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
205 /* Alignment exception. */
208 EXCEPTION_PROLOG(SRR0, SRR1)
213 addi r3,r1,STACK_FRAME_OVERHEAD
214 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
216 /* Program check exception */
219 EXCEPTION_PROLOG(SRR0, SRR1)
220 addi r3,r1,STACK_FRAME_OVERHEAD
221 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
224 /* FPU on MPC5xx available. We will use it later.
226 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
228 /* I guess we could implement decrementer, and may have
229 * to someday for timekeeping.
231 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
232 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
233 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
234 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
235 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
237 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
238 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
240 /* On the MPC8xx, this is a software emulation interrupt. It occurs
241 * for all unimplemented and illegal instructions.
243 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
244 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
245 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
246 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
247 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
249 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
250 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
251 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
252 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
253 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
254 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
255 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
257 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
258 STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
259 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
260 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
263 .globl _end_of_vectors
270 * This code finishes saving the registers to the exception frame
271 * and jumps to the appropriate handler for the exception.
272 * Register r21 is pointer into trap frame, r1 has new stack pointer.
274 .globl transfer_to_handler
285 andi. r24,r23,0x3f00 /* get vector offset */
289 mtspr SPRG2,r22 /* r1 is now kernel sp */
290 lwz r24,0(r23) /* virtual address of handler */
291 lwz r23,4(r23) /* where to go when done */
296 rfi /* jump to handler, enable MMU */
299 mfmsr r28 /* Disable interrupts */
303 SYNC /* Some chip revs need this... */
318 lwz r2,_NIP(r1) /* Restore environment */
330 * unsigned int get_immr (unsigned int mask)
332 * return (mask ? (IMMR & mask) : IMMR);
336 mr r4,r3 /* save mask */
337 mfspr r3, IMMR /* IMMR */
338 cmpwi 0,r4,0 /* mask != 0 ? */
340 and r3,r3,r4 /* IMMR & mask */
350 /*------------------------------------------------------------------------------*/
353 * void relocate_code (addr_sp, gd, addr_moni)
355 * This "function" does not return, instead it continues in RAM
356 * after relocating the monitor code.
360 * r5 = length in bytes
365 mr r1, r3 /* Set new stack pointer in SRAM */
366 mr r9, r4 /* Save copy of global data pointer in SRAM */
367 mr r10, r5 /* Save copy of monitor destination Address in SRAM */
370 #if defined(__pic__) && __pic__ == 1
371 /* Needed for upcoming -msingle-pic-base */
372 bl _GLOBAL_OFFSET_TABLE_@local-4
375 mr r3, r5 /* Destination Address */
376 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
377 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
378 lwz r5, GOT(__init_end)
384 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
390 /* First our own GOT */
392 /* the the one used by the C code */
402 beq cr1,4f /* In place copy is not necessary */
403 beq 4f /* Protect against 0 count */
425 * We are done. Do not return, instead branch to second part of board
426 * initialization, now running from RAM.
429 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
436 * Relocation Function, r12 point to got2+0x8000
438 * Adjust got2 pointers, no need to check for 0, this code
439 * already puts a few entries in the table.
441 li r0,__got2_entries@sectoff@l
442 la r3,GOT(_GOT2_TABLE_)
443 lwz r11,GOT(_GOT2_TABLE_)
455 * Now adjust the fixups and the pointers to the fixups
456 * in case we need to move ourselves again.
458 li r0,__fixup_entries@sectoff@l
459 lwz r3,GOT(_FIXUP_TABLE_)
475 * Now clear BSS segment
477 lwz r3,GOT(__bss_start)
478 lwz r4,GOT(__bss_end__)
490 mr r3, r9 /* Global Data pointer */
491 mr r4, r10 /* Destination Address */
495 * Copy exception vector code to low memory
498 * r7: source address, r8: end address, r9: target address
502 mflr r4 /* save link register */
505 lwz r8, GOT(_end_of_vectors)
507 li r9, 0x100 /* reset vector always at 0x100 */
510 bgelr /* return if r7>=r8 - just in case */
520 * relocate `hdlr' and `int_return' entries
522 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
523 li r8, Alignment - _start + EXC_OFF_SYS_RESET
526 addi r7, r7, 0x100 /* next exception vector */
530 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
533 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
536 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
537 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
540 addi r7, r7, 0x100 /* next exception vector */
544 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
545 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
548 addi r7, r7, 0x100 /* next exception vector */
552 mtlr r4 /* restore link register */
555 #if defined(CONFIG_PATI)
556 /* Program the PLL */
558 lis r4, (CONFIG_SYS_IMMR + 0x002fc384)@h
559 ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l
560 lis r3, (0x55ccaa33)@h
561 ori r3, r3, (0x55ccaa33)@l
563 lis r4, (CONFIG_SYS_IMMR + 0x002fc284)@h
564 ori r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l
565 lis r3, CONFIG_SYS_PLPRCR@h
566 ori r3, r3, CONFIG_SYS_PLPRCR@l
572 bdnz ..spinlp /* spin loop */