2 * (C) Copyright 2007-2009 DENX Software Engineering
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
12 DECLARE_GLOBAL_DATA_PTR;
14 #if defined(CONFIG_IDE_RESET)
16 void ide_set_reset (int idereset)
18 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
19 debug ("ide_set_reset(%d)\n", idereset);
22 out_be32(&im->pata.pata_ata_control, 0);
24 out_be32(&im->pata.pata_ata_control, FSL_ATA_CTRL_ATA_RST_B);
29 void init_ide_reset (void)
31 debug ("init_ide_reset\n");
34 * Clear the reset bit to reset the interface
35 * cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
39 /* Assert the reset bit to enable the interface */
44 #define CALC_TIMING(t) (t + period - 1) / period
46 int ide_preinit (void)
48 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
79 debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
82 /* Set the reset bit to 1 to enable the interface */
85 /* Init timings : we use PIO mode 0 timings */
86 t = 1000000000 / gd->arch.ips_clk; /* period in ns */
89 cfg.bytes.field3 = (pio_specs.t1 + t) / t;
90 cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
92 out_be32(&im->pata.pata_time1, cfg.config);
94 cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
95 cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
97 cfg.bytes.field4 = (pio_specs.t4 + t) / t;
99 out_be32(&im->pata.pata_time2, cfg.config);
101 cfg.config = in_be32(&im->pata.pata_time3);
102 cfg.bytes.field1 = (pio_specs.t9 + t) / t;
104 out_be32(&im->pata.pata_time3, cfg.config);
106 debug ("PATA preinit complete.\n");
111 #endif /* defined(CONFIG_IDE_RESET) */