2 * (C) Copyright 2003 - 2009
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * Based on the MPC5xxx code.
29 DECLARE_GLOBAL_DATA_PTR;
31 #ifdef CONFIG_HARD_I2C
35 /* by default set I2C bus 0 active */
36 static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
38 #define I2C_TIMEOUT 100
41 struct mpc512x_i2c_tap {
46 static int mpc_reg_in(volatile u32 *reg);
47 static void mpc_reg_out(volatile u32 *reg, int val, int mask);
48 static int wait_for_bb(void);
49 static int wait_for_pin(int *status);
50 static int do_address(uchar chip, char rdwr_flag);
51 static int send_bytes(uchar chip, char *buf, int len);
52 static int receive_bytes(uchar chip, char *buf, int len);
53 static int mpc_get_fdr(int);
55 static int mpc_reg_in (volatile u32 *reg)
57 int ret = in_be32(reg) >> 24;
62 static void mpc_reg_out (volatile u32 *reg, int val, int mask)
65 out_be32(reg, val << 24);
67 clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
71 static int wait_for_bb (void)
73 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
74 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
75 int timeout = I2C_TIMEOUT;
78 status = mpc_reg_in (®s->msr);
80 while (timeout-- && (status & I2C_BB)) {
82 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
83 temp = mpc_reg_in (®s->mdr);
84 mpc_reg_out (®s->mcr, 0, I2C_STA);
85 mpc_reg_out (®s->mcr, 0, 0);
86 mpc_reg_out (®s->mcr, I2C_EN, 0);
89 status = mpc_reg_in (®s->msr);
92 return (status & I2C_BB);
95 static int wait_for_pin (int *status)
97 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
98 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
99 int timeout = I2C_TIMEOUT;
101 *status = mpc_reg_in (®s->msr);
103 while (timeout-- && !(*status & I2C_IF)) {
105 *status = mpc_reg_in (®s->msr);
108 if (!(*status & I2C_IF)) {
112 mpc_reg_out (®s->msr, 0, I2C_IF);
117 static int do_address (uchar chip, char rdwr_flag)
119 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
120 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
129 mpc_reg_out (®s->mcr, I2C_TX, I2C_TX);
130 mpc_reg_out (®s->mdr, chip, 0);
132 if (wait_for_pin (&status)) {
136 if (status & I2C_RXAK) {
143 static int send_bytes (uchar chip, char *buf, int len)
145 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
146 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
150 for (wrcount = 0; wrcount < len; ++wrcount) {
152 mpc_reg_out (®s->mdr, buf[wrcount], 0);
154 if (wait_for_pin (&status)) {
158 if (status & I2C_RXAK) {
164 return !(wrcount == len);
167 static int receive_bytes (uchar chip, char *buf, int len)
169 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
170 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
176 mpc_reg_out (®s->mcr, 0, I2C_TX);
178 for (i = 0; i < len; ++i) {
179 buf[rdcount] = mpc_reg_in (®s->mdr);
187 if (wait_for_pin (&status)) {
192 mpc_reg_out (®s->mcr, I2C_TXAK, I2C_TXAK);
193 buf[rdcount++] = mpc_reg_in (®s->mdr);
195 if (wait_for_pin (&status)) {
199 mpc_reg_out (®s->mcr, 0, I2C_TXAK);
204 /**************** I2C API ****************/
206 void i2c_init (int speed, int saddr)
208 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
211 for (i = 0; i < I2C_BUS_CNT; i++){
212 volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
214 mpc_reg_out (®s->mcr, 0, 0);
217 mpc_reg_out (®s->mfdr, mpc_get_fdr (speed), 0);
218 mpc_reg_out (®s->madr, saddr << 1, 0);
221 mpc_reg_out (®s->mcr, I2C_EN, I2C_INIT_MASK);
222 mpc_reg_out (®s->msr, 0, I2C_IF);
225 /* Disable interrupts */
226 out_be32(&im->i2c.icr, 0);
228 /* Turn off filters */
229 out_be32(&im->i2c.mifr, 0);
232 static int mpc_get_fdr (int speed)
237 ulong best_speed = 0;
240 ulong bestmatch = 0xffffffffUL;
241 int best_i = 0, best_j = 0, i, j;
242 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
243 struct mpc512x_i2c_tap scltap[] = {
255 for (i = 7; i >= 0; i--) {
256 for (j = 7; j >= 0; j--) {
257 scl = 2 * (scltap[j].scl2tap +
258 (SCL_Tap[i] - 1) * scltap[j].tap2tap
260 if (ips <= speed*scl) {
261 if ((speed*scl - ips) < bestmatch) {
262 bestmatch = speed*scl - ips;
265 best_speed = ips/scl;
270 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
271 if (gd->flags & GD_FLG_RELOC) {
274 debug("%ld kHz, \n", best_speed / 1000);
282 int i2c_probe (uchar chip)
284 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
285 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
288 for (i = 0; i < I2C_RETRIES; i++) {
289 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
291 if (! do_address (chip, 0)) {
292 mpc_reg_out (®s->mcr, 0, I2C_STA);
297 mpc_reg_out (®s->mcr, 0, I2C_STA);
301 return (i == I2C_RETRIES);
304 int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
306 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
307 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
311 xaddr[0] = (addr >> 24) & 0xFF;
312 xaddr[1] = (addr >> 16) & 0xFF;
313 xaddr[2] = (addr >> 8) & 0xFF;
314 xaddr[3] = addr & 0xFF;
316 if (wait_for_bb ()) {
317 printf ("i2c_read: bus is busy\n");
321 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
322 if (do_address (chip, 0)) {
323 printf ("i2c_read: failed to address chip\n");
327 if (send_bytes (chip, &xaddr[4-alen], alen)) {
328 printf ("i2c_read: send_bytes failed\n");
332 mpc_reg_out (®s->mcr, I2C_RSTA, I2C_RSTA);
333 if (do_address (chip, 1)) {
334 printf ("i2c_read: failed to address chip\n");
338 if (receive_bytes (chip, (char *)buf, len)) {
339 printf ("i2c_read: receive_bytes failed\n");
345 mpc_reg_out (®s->mcr, 0, I2C_STA);
349 int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
351 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
352 volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
356 xaddr[0] = (addr >> 24) & 0xFF;
357 xaddr[1] = (addr >> 16) & 0xFF;
358 xaddr[2] = (addr >> 8) & 0xFF;
359 xaddr[3] = addr & 0xFF;
361 if (wait_for_bb ()) {
362 printf ("i2c_write: bus is busy\n");
366 mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
367 if (do_address (chip, 0)) {
368 printf ("i2c_write: failed to address chip\n");
372 if (send_bytes (chip, &xaddr[4-alen], alen)) {
373 printf ("i2c_write: send_bytes failed\n");
377 if (send_bytes (chip, (char *)buf, len)) {
378 printf ("i2c_write: send_bytes failed\n");
384 mpc_reg_out (®s->mcr, 0, I2C_STA);
388 int i2c_set_bus_num (unsigned int bus)
390 if (bus >= I2C_BUS_CNT) {
398 unsigned int i2c_get_bus_num (void)
403 #endif /* CONFIG_HARD_I2C */