3 * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
5 * SPDX-License-Identifier: GPL-2.0+
13 * written or collected and sometimes rewritten by
14 * Magnus Damm <damm@bitsmart.com>
16 * minor modifications by
17 * Wolfgang Denk <wd@denx.de>
19 * more modifications by
20 * Josh Huber <huber@mclx.com>
21 * added support for the 74xx series of cpus
22 * added support for the 7xx series of cpus
23 * made the code a little less hard-coded, and more auto-detectish
29 #include <asm/cache.h>
31 #if defined(CONFIG_OF_LIBFDT)
33 #include <fdt_support.h>
36 DECLARE_GLOBAL_DATA_PTR;
46 switch (PVR_VER(pvr)) {
53 if (((pvr >> 8) & 0xff) == 0x01) {
54 type = CPU_750CX; /* old CX (80100 and 8010x?)*/
55 } else if (((pvr >> 8) & 0xff) == 0x22) {
56 type = CPU_750CX; /* CX (82201,82202) and CXe (82214) */
57 } else if (((pvr >> 8) & 0xff) == 0x33) {
58 type = CPU_750CX; /* CXe (83311) */
59 } else if (((pvr >> 12) & 0xF) == 0x3) {
103 /* ------------------------------------------------------------------------- */
105 #if !defined(CONFIG_BAB7xx)
108 uint type = get_cpu_type();
109 uint pvr = get_pvr();
110 ulong clock = gd->cpu_clk;
118 printf ("750CX%s v%d.%d", (pvr&0xf0)?"e":"",
168 printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
172 printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
174 printf (" @ %s MHz\n", strmhz(buf, clock));
179 /* these two functions are unimplemented currently [josh] */
181 /* -------------------------------------------------------------------- */
190 /* -------------------------------------------------------------------- */
199 /* -------------------------------------------------------------------- */
202 soft_restart(unsigned long addr)
204 /* SRR0 has system reset vector, SRR1 has default MSR value */
205 /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
207 __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
208 __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
209 __asm__ __volatile__ ("mtspr 27, 4");
210 __asm__ __volatile__ ("rfi");
212 while(1); /* not reached */
216 #if !defined(CONFIG_BAB7xx) && \
217 !defined(CONFIG_ELPPC) && \
218 !defined(CONFIG_PPMC7XX)
219 /* no generic way to do board reset. simply call soft_reset. */
220 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
223 /* flush and disable I/D cache */
224 __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3");
225 __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5");
226 __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4");
227 __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5");
228 __asm__ __volatile__ ("sync");
229 __asm__ __volatile__ ("mtspr 1008, 4");
230 __asm__ __volatile__ ("isync");
231 __asm__ __volatile__ ("sync");
232 __asm__ __volatile__ ("mtspr 1008, 5");
233 __asm__ __volatile__ ("isync");
234 __asm__ __volatile__ ("sync");
236 #ifdef CONFIG_SYS_RESET_ADDRESS
237 addr = CONFIG_SYS_RESET_ADDRESS;
240 * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address,
241 * CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid
242 * address. Better pick an address known to be invalid on your
243 * system and assign it to CONFIG_SYS_RESET_ADDRESS.
245 addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong);
257 /* ------------------------------------------------------------------------- */
260 * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
262 #ifndef CONFIG_SYS_BUS_CLK
263 #define CONFIG_SYS_BUS_CLK gd->bus_clk
266 unsigned long get_tbclk(void)
268 return CONFIG_SYS_BUS_CLK / 4;
271 /* ------------------------------------------------------------------------- */
273 #if defined(CONFIG_WATCHDOG)
274 #if !defined(CONFIG_BAB7xx)
280 #endif /* !CONFIG_BAB7xx */
281 #endif /* CONFIG_WATCHDOG */
283 /* ------------------------------------------------------------------------- */
285 #ifdef CONFIG_OF_LIBFDT
286 void ft_cpu_setup(void *blob, bd_t *bd)
288 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
289 "timebase-frequency", bd->bi_busfreq / 4, 1);
290 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
291 "bus-frequency", bd->bi_busfreq, 1);
292 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
293 "clock-frequency", bd->bi_intfreq, 1);
295 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
297 fdt_fixup_ethernet(blob);
300 /* ------------------------------------------------------------------------- */