arch/mips/loongson64/common/env.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Based on Ocelot Linux port, which is
   4  * Copyright 2001 MontaVista Software Inc.
   5  * Author: jsun@mvista.com or jsun@junsun.net
   6  *
   7  * Copyright 2003 ICT CAS
   8  * Author: Michael Guo <guoyi@ict.ac.cn>
   9  *
  10  * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
  11  * Author: Fuxin Zhang, zhangfx@lemote.com
  12  *
  13  * Copyright (C) 2009 Lemote Inc.
  14  * Author: Wu Zhangjin, wuzhangjin@gmail.com
  15  */
  16 #include <linux/export.h>
  17 #include <asm/bootinfo.h>
  18 #include <loongson.h>
  19 #include <boot_param.h>
  20 #include <workarounds.h>
  21
  22 u32 cpu_clock_freq;
  23 EXPORT_SYMBOL(cpu_clock_freq);
  24 struct efi_memory_map_loongson *loongson_memmap;
  25 struct loongson_system_configuration loongson_sysconf;
  26
  27 u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
  28 u64 loongson_chiptemp[MAX_PACKAGES];
  29 u64 loongson_freqctrl[MAX_PACKAGES];
  30
  31 unsigned long long smp_group[4];
  32
  33 #define parse_even_earlier(res, option, p)                              \
  34 do {                                                                    \
  35         unsigned int tmp __maybe_unused;                                \
  36                                                                         \
  37         if (strncmp(option, (char *)p, strlen(option)) == 0)            \
  38                 tmp = kstrtou32((char *)p + strlen(option"="), 10, &res); \
  39 } while (0)
  40
  41 void __init prom_init_env(void)
  42 {
  43         /* pmon passes arguments in 32bit pointers */
  44         unsigned int processor_id;
  45
  46 #ifndef CONFIG_LEFI_FIRMWARE_INTERFACE
  47         int *_prom_envp;
  48         long l;
  49
  50         /* firmware arguments are initialized in head.S */
  51         _prom_envp = (int *)fw_arg2;
  52
  53         l = (long)*_prom_envp;
  54         while (l != 0) {
  55                 parse_even_earlier(cpu_clock_freq, "cpuclock", l);
  56                 parse_even_earlier(memsize, "memsize", l);
  57                 parse_even_earlier(highmemsize, "highmemsize", l);
  58                 _prom_envp++;
  59                 l = (long)*_prom_envp;
  60         }
  61         if (memsize == 0)
  62                 memsize = 256;
  63
  64         loongson_sysconf.nr_uarts = 1;
  65
  66         pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize);
  67 #else
  68         struct boot_params *boot_p;
  69         struct loongson_params *loongson_p;
  70         struct system_loongson *esys;
  71         struct efi_cpuinfo_loongson *ecpu;
  72         struct irq_source_routing_table *eirq_source;
  73
  74         /* firmware arguments are initialized in head.S */
  75         boot_p = (struct boot_params *)fw_arg2;
  76         loongson_p = &(boot_p->efi.smbios.lp);
  77
  78         esys = (struct system_loongson *)
  79                 ((u64)loongson_p + loongson_p->system_offset);
  80         ecpu = (struct efi_cpuinfo_loongson *)
  81                 ((u64)loongson_p + loongson_p->cpu_offset);
  82         eirq_source = (struct irq_source_routing_table *)
  83                 ((u64)loongson_p + loongson_p->irq_offset);
  84         loongson_memmap = (struct efi_memory_map_loongson *)
  85                 ((u64)loongson_p + loongson_p->memory_offset);
  86
  87         cpu_clock_freq = ecpu->cpu_clock_freq;
  88         loongson_sysconf.cputype = ecpu->cputype;
  89         switch (ecpu->cputype) {
  90         case Legacy_3A:
  91         case Loongson_3A:
  92                 loongson_sysconf.cores_per_node = 4;
  93                 loongson_sysconf.cores_per_package = 4;
  94                 smp_group[0] = 0x900000003ff01000;
  95                 smp_group[1] = 0x900010003ff01000;
  96                 smp_group[2] = 0x900020003ff01000;
  97                 smp_group[3] = 0x900030003ff01000;
  98                 loongson_chipcfg[0] = 0x900000001fe00180;
  99                 loongson_chipcfg[1] = 0x900010001fe00180;
 100                 loongson_chipcfg[2] = 0x900020001fe00180;
 101                 loongson_chipcfg[3] = 0x900030001fe00180;
 102                 loongson_chiptemp[0] = 0x900000001fe0019c;
 103                 loongson_chiptemp[1] = 0x900010001fe0019c;
 104                 loongson_chiptemp[2] = 0x900020001fe0019c;
 105                 loongson_chiptemp[3] = 0x900030001fe0019c;
 106                 loongson_freqctrl[0] = 0x900000001fe001d0;
 107                 loongson_freqctrl[1] = 0x900010001fe001d0;
 108                 loongson_freqctrl[2] = 0x900020001fe001d0;
 109                 loongson_freqctrl[3] = 0x900030001fe001d0;
 110                 loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
 111                 loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
 112                 break;
 113         case Legacy_3B:
 114         case Loongson_3B:
 115                 loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
 116                 loongson_sysconf.cores_per_package = 8;
 117                 smp_group[0] = 0x900000003ff01000;
 118                 smp_group[1] = 0x900010003ff05000;
 119                 smp_group[2] = 0x900020003ff09000;
 120                 smp_group[3] = 0x900030003ff0d000;
 121                 loongson_chipcfg[0] = 0x900000001fe00180;
 122                 loongson_chipcfg[1] = 0x900020001fe00180;
 123                 loongson_chipcfg[2] = 0x900040001fe00180;
 124                 loongson_chipcfg[3] = 0x900060001fe00180;
 125                 loongson_chiptemp[0] = 0x900000001fe0019c;
 126                 loongson_chiptemp[1] = 0x900020001fe0019c;
 127                 loongson_chiptemp[2] = 0x900040001fe0019c;
 128                 loongson_chiptemp[3] = 0x900060001fe0019c;
 129                 loongson_freqctrl[0] = 0x900000001fe001d0;
 130                 loongson_freqctrl[1] = 0x900020001fe001d0;
 131                 loongson_freqctrl[2] = 0x900040001fe001d0;
 132                 loongson_freqctrl[3] = 0x900060001fe001d0;
 133                 loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
 134                 loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
 135                 break;
 136         default:
 137                 loongson_sysconf.cores_per_node = 1;
 138                 loongson_sysconf.cores_per_package = 1;
 139                 loongson_chipcfg[0] = 0x900000001fe00180;
 140         }
 141
 142         loongson_sysconf.nr_cpus = ecpu->nr_cpus;
 143         loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
 144         loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
 145         if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
 146                 loongson_sysconf.nr_cpus = NR_CPUS;
 147         loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
 148                 loongson_sysconf.cores_per_node - 1) /
 149                 loongson_sysconf.cores_per_node;
 150
 151         loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
 152         loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
 153         loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
 154         loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
 155         if (loongson_sysconf.dma_mask_bits < 32 ||
 156                 loongson_sysconf.dma_mask_bits > 64)
 157                 loongson_sysconf.dma_mask_bits = 32;
 158
 159         loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
 160         loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
 161         loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
 162
 163         loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
 164         pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
 165                 loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
 166                 loongson_sysconf.vgabios_addr);
 167
 168         memset(loongson_sysconf.ecname, 0, 32);
 169         if (esys->has_ec)
 170                 memcpy(loongson_sysconf.ecname, esys->ec_name, 32);
 171         loongson_sysconf.workarounds |= esys->workarounds;
 172
 173         loongson_sysconf.nr_uarts = esys->nr_uarts;
 174         if (esys->nr_uarts < 1 || esys->nr_uarts > MAX_UARTS)
 175                 loongson_sysconf.nr_uarts = 1;
 176         memcpy(loongson_sysconf.uarts, esys->uarts,
 177                 sizeof(struct uart_device) * loongson_sysconf.nr_uarts);
 178
 179         loongson_sysconf.nr_sensors = esys->nr_sensors;
 180         if (loongson_sysconf.nr_sensors > MAX_SENSORS)
 181                 loongson_sysconf.nr_sensors = 0;
 182         if (loongson_sysconf.nr_sensors)
 183                 memcpy(loongson_sysconf.sensors, esys->sensors,
 184                         sizeof(struct sensor_device) * loongson_sysconf.nr_sensors);
 185 #endif
 186         if (cpu_clock_freq == 0) {
 187                 processor_id = (&current_cpu_data)->processor_id;
 188                 switch (processor_id & PRID_REV_MASK) {
 189                 case PRID_REV_LOONGSON2E:
 190                         cpu_clock_freq = 533080000;
 191                         break;
 192                 case PRID_REV_LOONGSON2F:
 193                         cpu_clock_freq = 797000000;
 194                         break;
 195                 case PRID_REV_LOONGSON3A_R1:
 196                 case PRID_REV_LOONGSON3A_R2_0:
 197                 case PRID_REV_LOONGSON3A_R2_1:
 198                 case PRID_REV_LOONGSON3A_R3_0:
 199                 case PRID_REV_LOONGSON3A_R3_1:
 200                         cpu_clock_freq = 900000000;
 201                         break;
 202                 case PRID_REV_LOONGSON3B_R1:
 203                 case PRID_REV_LOONGSON3B_R2:
 204                         cpu_clock_freq = 1000000000;
 205                         break;
 206                 default:
 207                         cpu_clock_freq = 100000000;
 208                         break;
 209                 }
 210         }
 211         pr_info("CpuClock = %u\n", cpu_clock_freq);
 212 }