arch/mips/dts/servalt_pcb116.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2018 Microsemi Corporation
   4  */
   5
   6 /dts-v1/;
   7 #include "mscc,servalt.dtsi"
   8
   9 / {
  10         model = "ServalT PCB116 Reference Board";
  11         compatible = "mscc,servalt-pcb116", "mscc,servalt";
  12
  13         aliases {
  14                 spi0 = &spi0;
  15                 serial0 = &uart0;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20         };
  21
  22         gpio-leds {
  23                 compatible = "gpio-leds";
  24
  25                 status_green {
  26                         label = "pcb116:green:status";
  27                         gpios = <&sgpio 70 0>; /* p6.2 */
  28                         default-state = "on";
  29                 };
  30
  31                 status_red {
  32                         label = "pcb116:red:status";
  33                         gpios = <&sgpio 102 0>; /* p6.3 */
  34                         default-state = "off";
  35                 };
  36         };
  37 };
  38
  39 &uart0 {
  40         status = "okay";
  41 };
  42
  43 &spi0 {
  44         status = "okay";
  45         spi-flash@0 {
  46                 compatible = "jedec,spi-nor";
  47                 spi-max-frequency = <18000000>; /* input clock */
  48                 reg = <0>; /* CS0 */
  49                 spi-cs-high;
  50         };
  51 };
  52
  53 &sgpio {
  54         status = "okay";
  55         sgpio-ports = <0x0000fe7f>;
  56 };
  57
  58 &mdio0 {
  59         status = "okay";
  60
  61         phy0: ethernet-phy@0 {
  62                 reg = <0>;
  63         };
  64         phy1: ethernet-phy@1 {
  65                 reg = <1>;
  66         };
  67 };
  68
  69 &switch {
  70         ethernet-ports {
  71
  72                 port0: port@0 {
  73                         reg = <0>;
  74                         phy-handle = <&phy0>;
  75                 };
  76                 port1: port@1 {
  77                         reg = <1>;
  78                         phy-handle = <&phy1>;
  79                 };
  80         };
  81 };