2 * Copyright 2015 Microchip Technology, Inc.
3 * Purna Chandra Mandal, <purna.mandal@microchip.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/microchip,clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "skeleton.dtsi"
14 compatible = "microchip,pic32mzda", "microchip,pic32mz";
31 compatible = "mips,mips14kc";
36 compatible = "microchip,pic32mzda-clk";
37 reg = <0x1f801200 0x1000>;
41 uart1: serial@1f822000 {
42 compatible = "microchip,pic32mzda-uart";
43 reg = <0x1f822000 0x50>;
44 interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
46 clocks = <&clock PB2CLK>;
49 uart2: serial@1f822200 {
50 compatible = "microchip,pic32mzda-uart";
51 reg = <0x1f822200 0x50>;
52 interrupts = <145 IRQ_TYPE_LEVEL_HIGH>;
53 clocks = <&clock PB2CLK>;
57 uart6: serial@1f822a00 {
58 compatible = "microchip,pic32mzda-uart";
59 reg = <0x1f822a00 0x50>;
60 interrupts = <188 IRQ_TYPE_LEVEL_HIGH>;
61 clocks = <&clock PB2CLK>;
65 evic: interrupt-controller@1f810000 {
66 compatible = "microchip,pic32mzda-evic";
68 #interrupt-cells = <2>;
69 reg = <0x1f810000 0x1000>;
72 pinctrl: pinctrl@1f801400 {
73 compatible = "microchip,pic32mzda-pinctrl";
74 reg = <0x1f801400 0x100>, /* in */
75 <0x1f801500 0x200>, /* out */
76 <0x1f860000 0xa00>; /* port */
77 reg-names = "ppsin","ppsout","port";
80 ranges = <0 0x1f860000 0xa00>;
84 compatible = "microchip,pic32mzda-gpio";
91 compatible = "microchip,pic32mzda-gpio";
98 compatible = "microchip,pic32mzda-gpio";
105 compatible = "microchip,pic32mzda-gpio";
112 compatible = "microchip,pic32mzda-gpio";
119 compatible = "microchip,pic32mzda-gpio";
126 compatible = "microchip,pic32mzda-gpio";
133 compatible = "microchip,pic32mzda-gpio";
140 compatible = "microchip,pic32mzda-gpio";
147 compatible = "microchip,pic32mzda-gpio";
154 sdhci: sdhci@1f8ec000 {
155 compatible = "microchip,pic32mzda-sdhci";
156 reg = <0x1f8ec000 0x100>;
157 interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
158 clocks = <&clock REF4CLK>, <&clock PB5CLK>;
159 clock-names = "base_clk", "sys_clk";
160 clock-freq-min-max = <25000000>,<25000000>;
165 ethernet: ethernet@1f882000 {
166 compatible = "microchip,pic32mzda-eth";
167 reg = <0x1f882000 0x1000>;
168 interrupts = <153 IRQ_TYPE_LEVEL_HIGH>;
169 clocks = <&clock PB5CLK>;
171 #address-cells = <1>;
176 compatible = "microchip,pic32mzda-usb";
177 reg = <0x1f8e3000 0x1000>,
179 reg-names = "mc", "control";
180 interrupts = <132 IRQ_TYPE_EDGE_RISING>,
181 <133 IRQ_TYPE_LEVEL_HIGH>;
182 clocks = <&clock PB5CLK>;
183 clock-names = "usb_clk";