3 #include <dt-bindings/clock/boston-clock.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 compatible = "img,boston";
23 compatible = "img,mips";
25 clocks = <&clk_boston BOSTON_CLK_CPU>;
30 device_type = "memory";
31 reg = <0x00000000 0x10000000>;
34 gic: interrupt-controller {
35 compatible = "mti,gic";
38 #interrupt-cells = <3>;
41 compatible = "mti,gic-timer";
42 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
43 clocks = <&clk_boston BOSTON_CLK_CPU>;
49 compatible = "xlnx,axi-pcie-host-1.00.a";
51 reg = <0x10000000 0x2000000>;
55 #interrupt-cells = <1>;
57 interrupt-parent = <&gic>;
58 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
60 ranges = <0x02000000 0 0x40000000
61 0x40000000 0 0x40000000>;
63 interrupt-map-mask = <0 0 0 7>;
64 interrupt-map = <0 0 0 1 &pci0_intc 0>,
65 <0 0 0 2 &pci0_intc 1>,
66 <0 0 0 3 &pci0_intc 2>,
67 <0 0 0 4 &pci0_intc 3>;
69 pci0_intc: interrupt-controller {
72 #interrupt-cells = <1>;
78 compatible = "xlnx,axi-pcie-host-1.00.a";
80 reg = <0x12000000 0x2000000>;
84 #interrupt-cells = <1>;
86 interrupt-parent = <&gic>;
87 interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
89 ranges = <0x02000000 0 0x20000000
90 0x20000000 0 0x20000000>;
92 interrupt-map-mask = <0 0 0 7>;
93 interrupt-map = <0 0 0 1 &pci1_intc 0>,
94 <0 0 0 2 &pci1_intc 1>,
95 <0 0 0 3 &pci1_intc 2>,
96 <0 0 0 4 &pci1_intc 3>;
98 pci1_intc: interrupt-controller {
100 #address-cells = <0>;
101 #interrupt-cells = <1>;
106 compatible = "xlnx,axi-pcie-host-1.00.a";
108 reg = <0x14000000 0x2000000>;
110 #address-cells = <3>;
112 #interrupt-cells = <1>;
114 interrupt-parent = <&gic>;
115 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
117 ranges = <0x02000000 0 0x16000000
118 0x16000000 0 0x100000>;
120 interrupt-map-mask = <0 0 0 7>;
121 interrupt-map = <0 0 0 1 &pci2_intc 0>,
122 <0 0 0 2 &pci2_intc 1>,
123 <0 0 0 3 &pci2_intc 2>,
124 <0 0 0 4 &pci2_intc 3>;
126 pci2_intc: interrupt-controller {
127 interrupt-controller;
128 #address-cells = <0>;
129 #interrupt-cells = <1>;
133 compatible = "pci10ee,7021";
134 reg = <0x00000000 0 0 0 0>;
136 #address-cells = <3>;
138 #interrupt-cells = <1>;
141 compatible = "pci8086,8800";
142 reg = <0x00010000 0 0 0 0>;
144 #address-cells = <3>;
146 #interrupt-cells = <1>;
149 compatible = "pci8086,8802";
150 reg = <0x00020100 0 0 0 0>;
151 phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
154 eg20t_gpio: eg20t_gpio@2,0,2 {
155 compatible = "pci8086,8803";
156 reg = <0x00020200 0 0 0 0>;
163 compatible = "pci8086,8817";
164 reg = <0x00026200 0 0 0 0>;
166 #address-cells = <1>;
170 compatible = "st,m41t81s";
178 plat_regs: system-controller@17ffd000 {
179 compatible = "img,boston-platform-regs", "syscon";
180 reg = <0x17ffd000 0x1000>;
185 compatible = "img,boston-clock";
187 regmap = <&plat_regs>;
191 reboot: syscon-reboot {
192 compatible = "syscon-reboot";
193 regmap = <&plat_regs>;
198 uart0: uart@17ffe000 {
199 compatible = "ns16550a";
200 reg = <0x17ffe000 0x1000>;
204 interrupt-parent = <&gic>;
205 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
207 clocks = <&clk_boston BOSTON_CLK_SYS>;
213 compatible = "img,boston-lcd";
214 reg = <0x17fff000 0x8>;
218 compatible = "cfi-flash";
219 reg = <0x18000000 0x8000000>;