Merge git://git.denx.de/u-boot-sunxi
[oweals/u-boot.git] / arch / mips / dts / brcm,bcm6362.dtsi
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2018 Ã\81lvaro Fernández Rojas <noltari@gmail.com>
4  */
5
6 #include <dt-bindings/clock/bcm6362-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
9 #include <dt-bindings/reset/bcm6362-reset.h>
10 #include "skeleton.dtsi"
11
12 / {
13         compatible = "brcm,bcm6362";
14
15         aliases {
16                 spi0 = &lsspi;
17                 spi1 = &hsspi;
18         };
19
20         cpus {
21                 reg = <0x10000000 0x4>;
22                 #address-cells = <1>;
23                 #size-cells = <0>;
24                 u-boot,dm-pre-reloc;
25
26                 cpu@0 {
27                         compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
28                         device_type = "cpu";
29                         reg = <0>;
30                         u-boot,dm-pre-reloc;
31                 };
32
33                 cpu@1 {
34                         compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
35                         device_type = "cpu";
36                         reg = <1>;
37                         u-boot,dm-pre-reloc;
38                 };
39         };
40
41         clocks {
42                 compatible = "simple-bus";
43                 #address-cells = <1>;
44                 #size-cells = <1>;
45                 u-boot,dm-pre-reloc;
46
47                 hsspi_pll: hsspi-pll {
48                         compatible = "fixed-clock";
49                         #clock-cells = <0>;
50                         clock-frequency = <133333333>;
51                 };
52
53                 periph_osc: periph-osc {
54                         compatible = "fixed-clock";
55                         #clock-cells = <0>;
56                         clock-frequency = <50000000>;
57                         u-boot,dm-pre-reloc;
58                 };
59
60                 periph_clk: periph-clk {
61                         compatible = "brcm,bcm6345-clk";
62                         reg = <0x10000004 0x4>;
63                         #clock-cells = <1>;
64                 };
65         };
66
67         ubus {
68                 compatible = "simple-bus";
69                 #address-cells = <1>;
70                 #size-cells = <1>;
71                 u-boot,dm-pre-reloc;
72
73                 pll_cntl: syscon@10000008 {
74                         compatible = "syscon";
75                         reg = <0x10000008 0x4>;
76                 };
77
78                 syscon-reboot {
79                         compatible = "syscon-reboot";
80                         regmap = <&pll_cntl>;
81                         offset = <0x0>;
82                         mask = <0x1>;
83                 };
84
85                 periph_rst: reset-controller@10000010 {
86                         compatible = "brcm,bcm6345-reset";
87                         reg = <0x10000010 0x4>;
88                         #reset-cells = <1>;
89                 };
90
91                 wdt: watchdog@1000005c {
92                         compatible = "brcm,bcm6345-wdt";
93                         reg = <0x1000005c 0xc>;
94                         clocks = <&periph_osc>;
95                 };
96
97                 wdt-reboot {
98                         compatible = "wdt-reboot";
99                         wdt = <&wdt>;
100                 };
101
102                 gpio1: gpio-controller@10000080 {
103                         compatible = "brcm,bcm6345-gpio";
104                         reg = <0x10000080 0x4>, <0x10000088 0x4>;
105                         gpio-controller;
106                         #gpio-cells = <2>;
107                         ngpios = <16>;
108
109                         status = "disabled";
110                 };
111
112                 gpio0: gpio-controller@10000084 {
113                         compatible = "brcm,bcm6345-gpio";
114                         reg = <0x10000084 0x4>, <0x1000008c 0x4>;
115                         gpio-controller;
116                         #gpio-cells = <2>;
117
118                         status = "disabled";
119                 };
120
121                 uart0: serial@10000100 {
122                         compatible = "brcm,bcm6345-uart";
123                         reg = <0x10000100 0x18>;
124                         clocks = <&periph_osc>;
125
126                         status = "disabled";
127                 };
128
129                 uart1: serial@10000120 {
130                         compatible = "brcm,bcm6345-uart";
131                         reg = <0x10000120 0x18>;
132                         clocks = <&periph_osc>;
133
134                         status = "disabled";
135                 };
136
137                 lsspi: spi@10000800 {
138                         compatible = "brcm,bcm6358-spi";
139                         reg = <0x10000800 0x70c>;
140                         #address-cells = <1>;
141                         #size-cells = <0>;
142                         clocks = <&periph_clk BCM6362_CLK_SPI>;
143                         resets = <&periph_rst BCM6362_RST_SPI>;
144                         spi-max-frequency = <20000000>;
145                         num-cs = <8>;
146
147                         status = "disabled";
148                 };
149
150                 hsspi: spi@10001000 {
151                         compatible = "brcm,bcm6328-hsspi";
152                         #address-cells = <1>;
153                         #size-cells = <0>;
154                         reg = <0x10001000 0x600>;
155                         clocks = <&periph_clk BCM6362_CLK_HSSPI>, <&hsspi_pll>;
156                         clock-names = "hsspi", "pll";
157                         resets = <&periph_rst BCM6362_RST_SPI>;
158                         spi-max-frequency = <50000000>;
159                         num-cs = <8>;
160
161                         status = "disabled";
162                 };
163
164                 leds: led-controller@10001900 {
165                         compatible = "brcm,bcm6328-leds";
166                         reg = <0x10001900 0x24>;
167                         #address-cells = <1>;
168                         #size-cells = <0>;
169
170                         status = "disabled";
171                 };
172
173                 periph_pwr: power-controller@10001848 {
174                         compatible = "brcm,bcm6328-power-domain";
175                         reg = <0x10001848 0x4>;
176                         #power-domain-cells = <1>;
177                 };
178
179                 ehci: usb-controller@10002500 {
180                         compatible = "brcm,bcm6362-ehci", "generic-ehci";
181                         reg = <0x10002500 0x100>;
182                         phys = <&usbh>;
183                         big-endian;
184
185                         status = "disabled";
186                 };
187
188                 ohci: usb-controller@10002600 {
189                         compatible = "brcm,bcm6362-ohci", "generic-ohci";
190                         reg = <0x10002600 0x100>;
191                         phys = <&usbh>;
192                         big-endian;
193
194                         status = "disabled";
195                 };
196
197                 usbh: usb-phy@10002700 {
198                         compatible = "brcm,bcm6368-usbh";
199                         reg = <0x10002700 0x38>;
200                         #phy-cells = <0>;
201                         clocks = <&periph_clk BCM6362_CLK_USBH>;
202                         clock-names = "usbh";
203                         power-domains = <&periph_pwr BCM6362_PWR_USBH>;
204                         resets = <&periph_rst BCM6362_RST_USBH>;
205
206                         status = "disabled";
207                 };
208
209                 memory-controller@10003000 {
210                         compatible = "brcm,bcm6328-mc";
211                         reg = <0x10003000 0x864>;
212                         u-boot,dm-pre-reloc;
213                 };
214         };
215 };