2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/clock/bcm6328-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
11 #include "skeleton.dtsi"
14 compatible = "brcm,bcm6328";
17 reg = <0x10000000 0x4>;
23 compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
30 compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
38 compatible = "simple-bus";
43 periph_osc: periph-osc {
44 compatible = "fixed-clock";
46 clock-frequency = <50000000>;
50 periph_clk: periph-clk {
51 compatible = "brcm,bcm6345-clk";
52 reg = <0x10000004 0x4>;
58 compatible = "simple-bus";
63 periph_rst: reset-controller@10000010 {
64 compatible = "brcm,bcm6345-reset";
65 reg = <0x10000010 0x4>;
69 pll_cntl: syscon@10000068 {
70 compatible = "syscon";
71 reg = <0x10000068 0x4>;
75 compatible = "syscon-reboot";
81 wdt: watchdog@1000005c {
82 compatible = "brcm,bcm6345-wdt";
83 reg = <0x1000005c 0xc>;
84 clocks = <&periph_osc>;
88 compatible = "wdt-reboot";
92 gpio: gpio-controller@10000084 {
93 compatible = "brcm,bcm6345-gpio";
94 reg = <0x10000084 0x4>, <0x1000008c 0x4>;
101 uart0: serial@10000100 {
102 compatible = "brcm,bcm6345-uart";
103 reg = <0x10000100 0x18>;
104 clocks = <&periph_osc>;
109 uart1: serial@10000120 {
110 compatible = "brcm,bcm6345-uart";
111 reg = <0x10000120 0x18>;
112 clocks = <&periph_osc>;
117 leds: led-controller@10000800 {
118 compatible = "brcm,bcm6328-leds";
119 reg = <0x10000800 0x24>;
120 #address-cells = <1>;
126 periph_pwr: power-controller@10001848 {
127 compatible = "brcm,bcm6328-power-domain";
128 reg = <0x10001848 0x4>;
129 #power-domain-cells = <1>;
132 memory-controller@10003000 {
133 compatible = "brcm,bcm6328-mc";
134 reg = <0x10003000 0x864>;