2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/clock/bcm6328-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
11 #include "skeleton.dtsi"
14 compatible = "brcm,bcm6328";
21 reg = <0x10000000 0x4>;
27 compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
34 compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
42 compatible = "simple-bus";
47 hsspi_pll: hsspi-pll {
48 compatible = "fixed-clock";
50 clock-frequency = <133333333>;
53 periph_osc: periph-osc {
54 compatible = "fixed-clock";
56 clock-frequency = <50000000>;
60 periph_clk: periph-clk {
61 compatible = "brcm,bcm6345-clk";
62 reg = <0x10000004 0x4>;
68 compatible = "simple-bus";
73 periph_rst: reset-controller@10000010 {
74 compatible = "brcm,bcm6345-reset";
75 reg = <0x10000010 0x4>;
79 pll_cntl: syscon@10000068 {
80 compatible = "syscon";
81 reg = <0x10000068 0x4>;
85 compatible = "syscon-reboot";
91 wdt: watchdog@1000005c {
92 compatible = "brcm,bcm6345-wdt";
93 reg = <0x1000005c 0xc>;
94 clocks = <&periph_osc>;
98 compatible = "wdt-reboot";
102 gpio: gpio-controller@10000084 {
103 compatible = "brcm,bcm6345-gpio";
104 reg = <0x10000084 0x4>, <0x1000008c 0x4>;
111 uart0: serial@10000100 {
112 compatible = "brcm,bcm6345-uart";
113 reg = <0x10000100 0x18>;
114 clocks = <&periph_osc>;
119 uart1: serial@10000120 {
120 compatible = "brcm,bcm6345-uart";
121 reg = <0x10000120 0x18>;
122 clocks = <&periph_osc>;
127 leds: led-controller@10000800 {
128 compatible = "brcm,bcm6328-leds";
129 reg = <0x10000800 0x24>;
130 #address-cells = <1>;
137 compatible = "brcm,bcm6328-hsspi";
138 #address-cells = <1>;
140 reg = <0x10001000 0x600>;
141 clocks = <&periph_clk BCM6328_CLK_HSSPI>, <&hsspi_pll>;
142 clock-names = "hsspi", "pll";
143 resets = <&periph_rst BCM6328_RST_SPI>;
144 spi-max-frequency = <33333334>;
150 periph_pwr: power-controller@10001848 {
151 compatible = "brcm,bcm6328-power-domain";
152 reg = <0x10001848 0x4>;
153 #power-domain-cells = <1>;
156 ehci: usb-controller@10002500 {
157 compatible = "brcm,bcm6328-ehci", "generic-ehci";
158 reg = <0x10002500 0x100>;
165 ohci: usb-controller@10002600 {
166 compatible = "brcm,bcm6328-ohci", "generic-ohci";
167 reg = <0x10002600 0x100>;
174 usbh: usb-phy@10002700 {
175 compatible = "brcm,bcm6328-usbh";
176 reg = <0x10002700 0x38>;
178 clocks = <&periph_clk BCM6328_CLK_USBH>;
179 clock-names = "usbh";
180 power-domains = <&periph_pwr BCM6328_PWR_USBH>;
181 resets = <&periph_rst BCM6328_RST_USBH>;
186 memory-controller@10003000 {
187 compatible = "brcm,bcm6328-mc";
188 reg = <0x10003000 0x864>;