arch/mips/dts/brcm,bcm6328.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
   4  */
   5
   6 #include <dt-bindings/clock/bcm6328-clock.h>
   7 #include <dt-bindings/dma/bcm6328-dma.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
  10 #include <dt-bindings/reset/bcm6328-reset.h>
  11 #include "skeleton.dtsi"
  12
  13 / {
  14         compatible = "brcm,bcm6328";
  15
  16         aliases {
  17                 spi0 = &spi;
  18         };
  19
  20         cpus {
  21                 reg = <0x10000000 0x4>;
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24                 u-boot,dm-pre-reloc;
  25
  26                 cpu@0 {
  27                         compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
  28                         device_type = "cpu";
  29                         reg = <0>;
  30                         u-boot,dm-pre-reloc;
  31                 };
  32
  33                 cpu@1 {
  34                         compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
  35                         device_type = "cpu";
  36                         reg = <1>;
  37                         u-boot,dm-pre-reloc;
  38                 };
  39         };
  40
  41         clocks {
  42                 compatible = "simple-bus";
  43                 #address-cells = <1>;
  44                 #size-cells = <1>;
  45                 u-boot,dm-pre-reloc;
  46
  47                 hsspi_pll: hsspi-pll {
  48                         compatible = "fixed-clock";
  49                         #clock-cells = <0>;
  50                         clock-frequency = <133333333>;
  51                 };
  52
  53                 periph_osc: periph-osc {
  54                         compatible = "fixed-clock";
  55                         #clock-cells = <0>;
  56                         clock-frequency = <50000000>;
  57                         u-boot,dm-pre-reloc;
  58                 };
  59
  60                 periph_clk: periph-clk {
  61                         compatible = "brcm,bcm6345-clk";
  62                         reg = <0x10000004 0x4>;
  63                         #clock-cells = <1>;
  64                 };
  65         };
  66
  67         ubus {
  68                 compatible = "simple-bus";
  69                 #address-cells = <1>;
  70                 #size-cells = <1>;
  71                 u-boot,dm-pre-reloc;
  72
  73                 periph_rst: reset-controller@10000010 {
  74                         compatible = "brcm,bcm6345-reset";
  75                         reg = <0x10000010 0x4>;
  76                         #reset-cells = <1>;
  77                 };
  78
  79                 pll_cntl: syscon@10000068 {
  80                         compatible = "syscon";
  81                         reg = <0x10000068 0x4>;
  82                 };
  83
  84                 syscon-reboot {
  85                         compatible = "syscon-reboot";
  86                         regmap = <&pll_cntl>;
  87                         offset = <0x0>;
  88                         mask = <0x1>;
  89                 };
  90
  91                 wdt: watchdog@1000005c {
  92                         compatible = "brcm,bcm6345-wdt";
  93                         reg = <0x1000005c 0xc>;
  94                         clocks = <&periph_osc>;
  95                 };
  96
  97                 wdt-reboot {
  98                         compatible = "wdt-reboot";
  99                         wdt = <&wdt>;
 100                 };
 101
 102                 gpio: gpio-controller@10000084 {
 103                         compatible = "brcm,bcm6345-gpio";
 104                         reg = <0x10000084 0x4>, <0x1000008c 0x4>;
 105                         gpio-controller;
 106                         #gpio-cells = <2>;
 107
 108                         status = "disabled";
 109                 };
 110
 111                 uart0: serial@10000100 {
 112                         compatible = "brcm,bcm6345-uart";
 113                         reg = <0x10000100 0x18>;
 114                         clocks = <&periph_osc>;
 115
 116                         status = "disabled";
 117                 };
 118
 119                 uart1: serial@10000120 {
 120                         compatible = "brcm,bcm6345-uart";
 121                         reg = <0x10000120 0x18>;
 122                         clocks = <&periph_osc>;
 123
 124                         status = "disabled";
 125                 };
 126
 127                 nand: nand-controller@10000200 {
 128                         #address-cells = <1>;
 129                         #size-cells = <0>;
 130                         compatible = "brcm,nand-bcm6368",
 131                                      "brcm,brcmnand-v2.2",
 132                                      "brcm,brcmnand";
 133                         reg-names = "nand",
 134                                     "nand-cache",
 135                                     "nand-int-base";
 136                         reg = <0x10000200 0x180>,
 137                               <0x10000400 0x200>,
 138                               <0x100000b0 0x10>;
 139
 140                         status = "disabled";
 141                 };
 142
 143                 leds: led-controller@10000800 {
 144                         compatible = "brcm,bcm6328-leds";
 145                         reg = <0x10000800 0x24>;
 146                         #address-cells = <1>;
 147                         #size-cells = <0>;
 148
 149                         status = "disabled";
 150                 };
 151
 152                 spi: spi@10001000 {
 153                         compatible = "brcm,bcm6328-hsspi";
 154                         #address-cells = <1>;
 155                         #size-cells = <0>;
 156                         reg = <0x10001000 0x600>;
 157                         clocks = <&periph_clk BCM6328_CLK_HSSPI>, <&hsspi_pll>;
 158                         clock-names = "hsspi", "pll";
 159                         resets = <&periph_rst BCM6328_RST_SPI>;
 160                         spi-max-frequency = <33333334>;
 161                         num-cs = <3>;
 162
 163                         status = "disabled";
 164                 };
 165
 166                 periph_pwr: power-controller@10001848 {
 167                         compatible = "brcm,bcm6328-power-domain";
 168                         reg = <0x10001848 0x4>;
 169                         #power-domain-cells = <1>;
 170                 };
 171
 172                 ehci: usb-controller@10002500 {
 173                         compatible = "brcm,bcm6328-ehci", "generic-ehci";
 174                         reg = <0x10002500 0x100>;
 175                         phys = <&usbh>;
 176                         big-endian;
 177
 178                         status = "disabled";
 179                 };
 180
 181                 ohci: usb-controller@10002600 {
 182                         compatible = "brcm,bcm6328-ohci", "generic-ohci";
 183                         reg = <0x10002600 0x100>;
 184                         phys = <&usbh>;
 185                         big-endian;
 186
 187                         status = "disabled";
 188                 };
 189
 190                 usbh: usb-phy@10002700 {
 191                         compatible = "brcm,bcm6328-usbh";
 192                         reg = <0x10002700 0x38>;
 193                         #phy-cells = <0>;
 194                         clocks = <&periph_clk BCM6328_CLK_USBH>;
 195                         clock-names = "usbh";
 196                         power-domains = <&periph_pwr BCM6328_PWR_USBH>;
 197                         resets = <&periph_rst BCM6328_RST_USBH>;
 198
 199                         status = "disabled";
 200                 };
 201
 202                 memory-controller@10003000 {
 203                         compatible = "brcm,bcm6328-mc";
 204                         reg = <0x10003000 0x864>;
 205                         u-boot,dm-pre-reloc;
 206                 };
 207
 208                 iudma: dma-controller@1000d800 {
 209                         compatible = "brcm,bcm6368-iudma";
 210                         reg = <0x1000d800 0x80>,
 211                               <0x1000da00 0x80>,
 212                               <0x1000dc00 0x80>;
 213                         reg-names = "dma",
 214                                     "dma-channels",
 215                                     "dma-sram";
 216                         #dma-cells = <1>;
 217                         dma-channels = <8>;
 218                 };
 219
 220                 enet: ethernet@10e00000 {
 221                         compatible = "brcm,bcm6368-enet";
 222                         #address-cells = <1>;
 223                         #size-cells = <0>;
 224                         reg = <0x10e00000 0x10000>;
 225                         clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
 226                         resets = <&periph_rst BCM6328_RST_ENETSW>,
 227                                  <&periph_rst BCM6328_RST_EPHY>;
 228                         dmas = <&iudma BCM6328_DMA_ENETSW_RX>,
 229                                <&iudma BCM6328_DMA_ENETSW_TX>;
 230                         dma-names = "rx",
 231                                     "tx";
 232                         brcm,num-ports = <5>;
 233
 234                         status = "disabled";
 235                 };
 236         };
 237 };