2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/clock/bcm63268-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
10 #include <dt-bindings/reset/bcm63268-reset.h>
11 #include "skeleton.dtsi"
14 compatible = "brcm,bcm63268";
17 reg = <0x10000000 0x4>;
23 compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
30 compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
38 compatible = "simple-bus";
43 periph_osc: periph-osc {
44 compatible = "fixed-clock";
46 clock-frequency = <50000000>;
50 periph_clk: periph-clk {
51 compatible = "brcm,bcm6345-clk";
52 reg = <0x10000004 0x4>;
56 timer_clk: timer-clk {
57 compatible = "brcm,bcm6345-clk";
58 reg = <0x100000ac 0x4>;
64 compatible = "simple-bus";
69 pll_cntl: syscon@10000008 {
70 compatible = "syscon";
71 reg = <0x10000008 0x4>;
75 compatible = "syscon-reboot";
81 periph_rst: reset-controller@10000010 {
82 compatible = "brcm,bcm6345-reset";
83 reg = <0x10000010 0x4>;
87 gpio1: gpio-controller@100000c0 {
88 compatible = "brcm,bcm6345-gpio";
89 reg = <0x100000c0 0x4>, <0x100000c8 0x4>;
97 gpio0: gpio-controller@100000c4 {
98 compatible = "brcm,bcm6345-gpio";
99 reg = <0x100000c4 0x4>, <0x100000cc 0x4>;
106 uart0: serial@10000180 {
107 compatible = "brcm,bcm6345-uart";
108 reg = <0x10000180 0x18>;
109 clocks = <&periph_osc>;
114 uart1: serial@100001a0 {
115 compatible = "brcm,bcm6345-uart";
116 reg = <0x100001a0 0x18>;
117 clocks = <&periph_osc>;
122 periph_pwr: power-controller@1000184c {
123 compatible = "brcm,bcm6328-power-domain";
124 reg = <0x1000184c 0x4>;
125 #power-domain-cells = <1>;
128 leds: led-controller@10001900 {
129 compatible = "brcm,bcm6328-leds";
130 reg = <0x10001900 0x24>;
131 #address-cells = <1>;
137 memory-controller@10003000 {
138 compatible = "brcm,bcm6328-mc";
139 reg = <0x10003000 0x894>;