3 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/mipsregs.h>
28 #include <asm/cacheops.h>
29 #include <asm/reboot.h>
31 #define cache_op(op, addr) \
32 __asm__ __volatile__( \
39 : "i" (op), "R" (*(unsigned char *)(addr)))
41 void __attribute__((weak)) _machine_restart(void)
43 fprintf(stderr, "*** reset failed ***\n");
49 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
56 void flush_cache(ulong start_addr, ulong size)
58 unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
59 unsigned long addr = start_addr & ~(lsize - 1);
60 unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
62 /* aend will be miscalculated when size is zero, so we return here */
67 cache_op(HIT_WRITEBACK_INV_D, addr);
68 cache_op(HIT_INVALIDATE_I, addr);
75 void flush_dcache_range(ulong start_addr, ulong stop)
77 unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
78 unsigned long addr = start_addr & ~(lsize - 1);
79 unsigned long aend = (stop - 1) & ~(lsize - 1);
82 cache_op(HIT_WRITEBACK_INV_D, addr);
89 void invalidate_dcache_range(ulong start_addr, ulong stop)
91 unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
92 unsigned long addr = start_addr & ~(lsize - 1);
93 unsigned long aend = (stop - 1) & ~(lsize - 1);
96 cache_op(HIT_INVALIDATE_D, addr);
103 void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
105 write_c0_entrylo0(low0);
106 write_c0_pagemask(pagemask);
107 write_c0_entrylo1(low1);
108 write_c0_entryhi(hi);
109 write_c0_index(index);