1 menu "MIPS architecture"
8 default "mips32" if CPU_MIPS32
9 default "mips64" if CPU_MIPS64
12 prompt "Target select"
15 config TARGET_QEMU_MIPS
16 bool "Support qemu-mips"
17 select SUPPORTS_BIG_ENDIAN
18 select SUPPORTS_LITTLE_ENDIAN
19 select SUPPORTS_CPU_MIPS32_R1
20 select SUPPORTS_CPU_MIPS32_R2
21 select SUPPORTS_CPU_MIPS64_R1
22 select SUPPORTS_CPU_MIPS64_R2
26 select DYNAMIC_IO_PORT_BASE
27 select SUPPORTS_BIG_ENDIAN
28 select SUPPORTS_LITTLE_ENDIAN
29 select SUPPORTS_CPU_MIPS32_R1
30 select SUPPORTS_CPU_MIPS32_R2
31 select SUPPORTS_CPU_MIPS32_R6
33 select MIPS_L1_CACHE_SHIFT_6
37 select SUPPORTS_BIG_ENDIAN
38 select SUPPORTS_CPU_MIPS32_R1
39 select SUPPORTS_CPU_MIPS32_R2
40 select SYS_MIPS_CACHE_INIT_RAM_LOAD
42 config TARGET_DBAU1X00
43 bool "Support dbau1x00"
44 select SUPPORTS_BIG_ENDIAN
45 select SUPPORTS_LITTLE_ENDIAN
46 select SUPPORTS_CPU_MIPS32_R1
47 select SUPPORTS_CPU_MIPS32_R2
48 select SYS_MIPS_CACHE_INIT_RAM_LOAD
53 select SUPPORTS_LITTLE_ENDIAN
54 select SUPPORTS_CPU_MIPS32_R1
55 select SUPPORTS_CPU_MIPS32_R2
56 select SYS_MIPS_CACHE_INIT_RAM_LOAD
60 bool "Support QCA/Atheros ath79"
65 bool "Support Microchip PIC32"
71 source "board/dbau1x00/Kconfig"
72 source "board/imgtec/malta/Kconfig"
73 source "board/micronas/vct/Kconfig"
74 source "board/pb1x00/Kconfig"
75 source "board/qemu-mips/Kconfig"
76 source "arch/mips/mach-ath79/Kconfig"
77 source "arch/mips/mach-pic32/Kconfig"
82 prompt "Endianness selection"
84 Some MIPS boards can be configured for either little or big endian
85 byte order. These modes require different U-Boot images. In general there
86 is one preferred byteorder for a particular system but some systems are
87 just as commonly used in the one or the other endianness.
91 depends on SUPPORTS_BIG_ENDIAN
93 config SYS_LITTLE_ENDIAN
95 depends on SUPPORTS_LITTLE_ENDIAN
100 prompt "CPU selection"
101 default CPU_MIPS32_R2
104 bool "MIPS32 Release 1"
105 depends on SUPPORTS_CPU_MIPS32_R1
108 Choose this option to build an U-Boot for release 1 through 5 of the
112 bool "MIPS32 Release 2"
113 depends on SUPPORTS_CPU_MIPS32_R2
116 Choose this option to build an U-Boot for release 2 through 5 of the
120 bool "MIPS32 Release 6"
121 depends on SUPPORTS_CPU_MIPS32_R6
124 Choose this option to build an U-Boot for release 6 or later of the
128 bool "MIPS64 Release 1"
129 depends on SUPPORTS_CPU_MIPS64_R1
132 Choose this option to build a kernel for release 1 through 5 of the
136 bool "MIPS64 Release 2"
137 depends on SUPPORTS_CPU_MIPS64_R2
140 Choose this option to build a kernel for release 2 through 5 of the
144 bool "MIPS64 Release 6"
145 depends on SUPPORTS_CPU_MIPS64_R6
148 Choose this option to build a kernel for release 6 or later of the
153 menu "OS boot interface"
155 config MIPS_BOOT_CMDLINE_LEGACY
156 bool "Hand over legacy command line to Linux kernel"
159 Enable this option if you want U-Boot to hand over the Yamon-style
160 command line to the kernel. All bootargs will be prepared as argc/argv
161 compatible list. The argument count (argc) is stored in register $a0.
162 The address of the argument list (argv) is stored in register $a1.
164 config MIPS_BOOT_ENV_LEGACY
165 bool "Hand over legacy environment to Linux kernel"
168 Enable this option if you want U-Boot to hand over the Yamon-style
169 environment to the kernel. Information like memory size, initrd
170 address and size will be prepared as zero-terminated key/value list.
171 The address of the environment is stored in register $a2.
174 bool "Hand over a flattened device tree to Linux kernel"
177 Enable this option if you want U-Boot to hand over a flattened
178 device tree to the kernel. According to UHI register $a0 will be set
179 to -2 and the FDT address is stored in $a1.
183 config SUPPORTS_BIG_ENDIAN
186 config SUPPORTS_LITTLE_ENDIAN
189 config SUPPORTS_CPU_MIPS32_R1
192 config SUPPORTS_CPU_MIPS32_R2
195 config SUPPORTS_CPU_MIPS32_R6
198 config SUPPORTS_CPU_MIPS64_R1
201 config SUPPORTS_CPU_MIPS64_R2
204 config SUPPORTS_CPU_MIPS64_R6
209 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
213 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
218 config MIPS_TUNE_14KC
221 config MIPS_TUNE_24KC
224 config MIPS_TUNE_74KC
236 config SYS_MIPS_CACHE_INIT_RAM_LOAD
239 config MIPS_L1_CACHE_SHIFT_4
242 config MIPS_L1_CACHE_SHIFT_5
245 config MIPS_L1_CACHE_SHIFT_6
248 config MIPS_L1_CACHE_SHIFT_7
251 config MIPS_L1_CACHE_SHIFT
253 default "7" if MIPS_L1_CACHE_SHIFT_7
254 default "6" if MIPS_L1_CACHE_SHIFT_6
255 default "5" if MIPS_L1_CACHE_SHIFT_5
256 default "4" if MIPS_L1_CACHE_SHIFT_4
259 config DYNAMIC_IO_PORT_BASE