1 menu "MIPS architecture"
8 default "mips32" if CPU_MIPS32
9 default "mips64" if CPU_MIPS64
12 prompt "Target select"
15 config TARGET_QEMU_MIPS
16 bool "Support qemu-mips"
17 select SUPPORTS_BIG_ENDIAN
18 select SUPPORTS_LITTLE_ENDIAN
19 select SUPPORTS_CPU_MIPS32_R1
20 select SUPPORTS_CPU_MIPS32_R2
21 select SUPPORTS_CPU_MIPS64_R1
22 select SUPPORTS_CPU_MIPS64_R2
28 select DYNAMIC_IO_PORT_BASE
31 select SUPPORTS_BIG_ENDIAN
32 select SUPPORTS_LITTLE_ENDIAN
33 select SUPPORTS_CPU_MIPS32_R1
34 select SUPPORTS_CPU_MIPS32_R2
35 select SUPPORTS_CPU_MIPS32_R6
37 select MIPS_L1_CACHE_SHIFT_6
41 select SUPPORTS_BIG_ENDIAN
42 select SUPPORTS_CPU_MIPS32_R1
43 select SUPPORTS_CPU_MIPS32_R2
44 select SYS_MIPS_CACHE_INIT_RAM_LOAD
46 config TARGET_DBAU1X00
47 bool "Support dbau1x00"
48 select SUPPORTS_BIG_ENDIAN
49 select SUPPORTS_LITTLE_ENDIAN
50 select SUPPORTS_CPU_MIPS32_R1
51 select SUPPORTS_CPU_MIPS32_R2
52 select SYS_MIPS_CACHE_INIT_RAM_LOAD
57 select SUPPORTS_LITTLE_ENDIAN
58 select SUPPORTS_CPU_MIPS32_R1
59 select SUPPORTS_CPU_MIPS32_R2
60 select SYS_MIPS_CACHE_INIT_RAM_LOAD
64 bool "Support QCA/Atheros ath79"
69 bool "Support Microchip PIC32"
75 source "board/dbau1x00/Kconfig"
76 source "board/imgtec/malta/Kconfig"
77 source "board/micronas/vct/Kconfig"
78 source "board/pb1x00/Kconfig"
79 source "board/qemu-mips/Kconfig"
80 source "arch/mips/mach-ath79/Kconfig"
81 source "arch/mips/mach-pic32/Kconfig"
86 prompt "Endianness selection"
88 Some MIPS boards can be configured for either little or big endian
89 byte order. These modes require different U-Boot images. In general there
90 is one preferred byteorder for a particular system but some systems are
91 just as commonly used in the one or the other endianness.
95 depends on SUPPORTS_BIG_ENDIAN
97 config SYS_LITTLE_ENDIAN
99 depends on SUPPORTS_LITTLE_ENDIAN
104 prompt "CPU selection"
105 default CPU_MIPS32_R2
108 bool "MIPS32 Release 1"
109 depends on SUPPORTS_CPU_MIPS32_R1
112 Choose this option to build an U-Boot for release 1 through 5 of the
116 bool "MIPS32 Release 2"
117 depends on SUPPORTS_CPU_MIPS32_R2
120 Choose this option to build an U-Boot for release 2 through 5 of the
124 bool "MIPS32 Release 6"
125 depends on SUPPORTS_CPU_MIPS32_R6
128 Choose this option to build an U-Boot for release 6 or later of the
132 bool "MIPS64 Release 1"
133 depends on SUPPORTS_CPU_MIPS64_R1
136 Choose this option to build a kernel for release 1 through 5 of the
140 bool "MIPS64 Release 2"
141 depends on SUPPORTS_CPU_MIPS64_R2
144 Choose this option to build a kernel for release 2 through 5 of the
148 bool "MIPS64 Release 6"
149 depends on SUPPORTS_CPU_MIPS64_R6
152 Choose this option to build a kernel for release 6 or later of the
157 menu "OS boot interface"
159 config MIPS_BOOT_CMDLINE_LEGACY
160 bool "Hand over legacy command line to Linux kernel"
163 Enable this option if you want U-Boot to hand over the Yamon-style
164 command line to the kernel. All bootargs will be prepared as argc/argv
165 compatible list. The argument count (argc) is stored in register $a0.
166 The address of the argument list (argv) is stored in register $a1.
168 config MIPS_BOOT_ENV_LEGACY
169 bool "Hand over legacy environment to Linux kernel"
172 Enable this option if you want U-Boot to hand over the Yamon-style
173 environment to the kernel. Information like memory size, initrd
174 address and size will be prepared as zero-terminated key/value list.
175 The address of the environment is stored in register $a2.
178 bool "Hand over a flattened device tree to Linux kernel"
181 Enable this option if you want U-Boot to hand over a flattened
182 device tree to the kernel. According to UHI register $a0 will be set
183 to -2 and the FDT address is stored in $a1.
187 config SUPPORTS_BIG_ENDIAN
190 config SUPPORTS_LITTLE_ENDIAN
193 config SUPPORTS_CPU_MIPS32_R1
196 config SUPPORTS_CPU_MIPS32_R2
199 config SUPPORTS_CPU_MIPS32_R6
202 config SUPPORTS_CPU_MIPS64_R1
205 config SUPPORTS_CPU_MIPS64_R2
208 config SUPPORTS_CPU_MIPS64_R6
213 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
217 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
222 config MIPS_TUNE_14KC
225 config MIPS_TUNE_24KC
228 config MIPS_TUNE_74KC
240 config SYS_MIPS_CACHE_INIT_RAM_LOAD
243 config MIPS_L1_CACHE_SHIFT_4
246 config MIPS_L1_CACHE_SHIFT_5
249 config MIPS_L1_CACHE_SHIFT_6
252 config MIPS_L1_CACHE_SHIFT_7
255 config MIPS_L1_CACHE_SHIFT
257 default "7" if MIPS_L1_CACHE_SHIFT_7
258 default "6" if MIPS_L1_CACHE_SHIFT_6
259 default "5" if MIPS_L1_CACHE_SHIFT_5
260 default "4" if MIPS_L1_CACHE_SHIFT_4
263 config DYNAMIC_IO_PORT_BASE