1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007 Michal Simek
4 * (C) Copyright 2004 Atmark Techno, Inc.
6 * Michal SIMEK <monstr@monstr.eu>
7 * Yasushi SHOJI <yashi@atmark-techno.com>
10 #include <asm-offsets.h>
18 * r10: Stores little/big endian offset for vectors
19 * r2: Stores imm opcode
20 * r3: Stores brai opcode
23 mts rmsr, r0 /* disable cache */
27 /* TODO: Redo this code to call board_init_f_*() */
28 #if defined(CONFIG_SPL_BUILD)
29 addi r1, r0, CONFIG_SPL_STACK_ADDR
31 addi r1, r1, -4 /* Decrement SP to top of memory */
33 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
34 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
36 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
39 addi r1, r1, -4 /* Decrement SP to top of memory */
41 /* Find-out if u-boot is running on BIG/LITTLE endian platform
42 * There are some steps which is necessary to keep in mind:
43 * 1. Setup offset value to r6
44 * 2. Store word offset value to address 0x0
45 * 3. Load just byte from address 0x0
46 * 4a) LITTLE endian - r10 contains 0x2 because it is the smallest
47 * value that's why is on address 0x0
48 * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
50 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
52 swi r6, r0, 0x28 /* used first unused MB vector */
53 lbui r10, r0, 0x28 /* used first unused MB vector */
56 /* add opcode instruction for 32bit jump - 2 instruction imm & brai */
57 addi r2, r0, 0xb0000000 /* hex b000 opcode imm */
58 addi r3, r0, 0xb8080000 /* hew b808 opcode brai */
60 #ifdef CONFIG_SYS_RESET_ADDRESS
62 swi r2, r0, 0x0 /* reset address - imm opcode */
63 swi r3, r0, 0x4 /* reset address - brai opcode */
65 addik r6, r0, CONFIG_SYS_RESET_ADDRESS
74 #ifdef CONFIG_SYS_USR_EXCEP
75 /* user_vector_exception */
76 swi r2, r0, 0x8 /* user vector exception - imm opcode */
77 swi r3, r0, 0xC /* user vector exception - brai opcode */
79 addik r6, r0, _exception_handler
82 * BIG ENDIAN memory map for user exception
86 * then it is necessary to count address for storing the most significant
87 * 16bits from _exception_handler address and copy it to
88 * 0xa address. Big endian use offset in r10=0 that's why is it just
89 * 0xa address. The same is done for the least significant 16 bits
92 * LITTLE ENDIAN memory map for user exception
96 * Offset is for little endian setup to 0x2. rsubi instruction decrease
97 * address value to ensure that points to proper place which is
98 * 0x8 for the most significant 16 bits and
99 * 0xC for the least significant 16 bits
108 /* interrupt_handler */
109 swi r2, r0, 0x10 /* interrupt - imm opcode */
110 swi r3, r0, 0x14 /* interrupt - brai opcode */
112 addik r6, r0, _interrupt_handler
120 /* hardware exception */
121 swi r2, r0, 0x20 /* hardware exception - imm opcode */
122 swi r3, r0, 0x24 /* hardware exception - brai opcode */
124 addik r6, r0, _hw_exception_handler
131 #endif /* CONFIG_SPL_BUILD */
133 /* Flush cache before enable cache */
135 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
136 bralid r15, flush_cache
139 /* enable instruction and data cache */
144 /* TODO: Redo this code to call board_init_f_*() */
146 /* clear BSS segments */
147 addi r5, r0, __bss_start
148 addi r4, r0, __bss_end
152 swi r0, r5, 0 /* write zero to loc */
153 addi r5, r5, 4 /* increment to next loc */
154 cmp r6, r5, r4 /* check if we have reach the end */
156 3: /* jumping to board_init */
157 #ifdef CONFIG_DEBUG_UART
158 bralid r15, debug_uart_init
161 #ifndef CONFIG_SPL_BUILD
162 or r5, r0, r0 /* flags - empty */
164 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
165 addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET
166 swi r6, r31, GD_MALLOC_BASE
171 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
172 addi r6, r0, CONFIG_SPL_STACK_ADDR
173 swi r6, r31, GD_MALLOC_BASE
182 .space GENERATED_GBL_DATA_SIZE
184 #ifndef CONFIG_SPL_BUILD
186 * Read 16bit little endian
202 * Write 16bit little endian
203 * first parameter(r5) - address, second(r6) - short value
209 out16: bslli r3, r6, 8
222 .global relocate_code
231 addi r1, r5, 0 /* Start to use new SP */
232 addi r31, r6, 0 /* Start to use new GD */
234 add r23, r0, r7 /* Move reloc addr to r23 */
235 /* Relocate text and data - r12 temp value */
237 addi r22, r0, __end - 4 /* Include BSS too */
241 1: lw r12, r21, r5 /* Load u-boot data */
242 sw r12, r23, r5 /* Write zero to loc */
243 cmp r12, r5, r6 /* Check if we have reach the end */
245 addi r5, r5, 4 /* Increment to next loc - relocate code */
247 /* R23 points to the base address. */
248 add r23, r0, r7 /* Move reloc addr to r23 */
249 addi r24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */
250 rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */
252 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
254 swi r6, r0, 0x28 /* used first unused MB vector */
255 lbui r10, r0, 0x28 /* used first unused MB vector */
258 #ifdef CONFIG_SYS_USR_EXCEP
259 addik r6, r0, _exception_handler
260 addk r6, r6, r23 /* add offset */
268 addik r6, r0, _hw_exception_handler
269 addk r6, r6, r23 /* add offset */
277 addik r6, r0, _interrupt_handler
278 addk r6, r6, r23 /* add offset */
286 /* Check if GOT exist */
287 addik r21, r23, _got_start
288 addik r22, r23, _got_end
290 beqi r12, 2f /* No GOT table - jump over */
292 /* Skip last 3 entries plus 1 because of loop boundary below */
293 addik r22, r22, -0x10
295 /* Relocate the GOT. */
296 3: lw r12, r21, r0 /* Load entry */
297 addk r12, r12, r23 /* Add reloc offset */
298 sw r12, r21, r0 /* Save entry back */
300 cmpu r12, r21, r22 /* Check if this cross boundary */
304 /* Update pointer to GOT */
306 addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8
309 /* Flush caches to ensure consistency */
311 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
312 bralid r15, flush_cache
315 2: addi r5, r31, 0 /* gd is initialized in board_r.c */
316 addi r6, r0, CONFIG_SYS_TEXT_BASE
317 addi r12, r23, board_init_r
318 bra r12 /* Jump to relocated code */