1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * MCF5274/5 Internal Memory Map
5 * Copyright (c) 2005 Arthur Shipkowski <art@videon-central.com>
6 * Based on work Copyright (c) 2003 Josef Baumgartner
7 * <josef.baumgartner@telex.de>
10 #ifndef __IMMAP_5275__
11 #define __IMMAP_5275__
13 #define MMAP_SCM (CONFIG_SYS_MBAR + 0x00000000)
14 #define MMAP_SDRAM (CONFIG_SYS_MBAR + 0x00000040)
15 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000080)
16 #define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x00000100)
17 #define MMAP_DMA1 (CONFIG_SYS_MBAR + 0x00000110)
18 #define MMAP_DMA2 (CONFIG_SYS_MBAR + 0x00000120)
19 #define MMAP_DMA3 (CONFIG_SYS_MBAR + 0x00000130)
20 #define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000200)
21 #define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000240)
22 #define MMAP_UART2 (CONFIG_SYS_MBAR + 0x00000280)
23 #define MMAP_I2C (CONFIG_SYS_MBAR + 0x00000300)
24 #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x00000340)
25 #define MMAP_DTMR0 (CONFIG_SYS_MBAR + 0x00000400)
26 #define MMAP_DTMR1 (CONFIG_SYS_MBAR + 0x00000440)
27 #define MMAP_DTMR2 (CONFIG_SYS_MBAR + 0x00000480)
28 #define MMAP_DTMR3 (CONFIG_SYS_MBAR + 0x000004C0)
29 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00000C00)
30 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x00000D00)
31 #define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00000F00)
32 #define MMAP_FEC0 (CONFIG_SYS_MBAR + 0x00001000)
33 #define MMAP_FEC0FIFO (CONFIG_SYS_MBAR + 0x00001400)
34 #define MMAP_FEC1 (CONFIG_SYS_MBAR + 0x00001800)
35 #define MMAP_FEC1FIFO (CONFIG_SYS_MBAR + 0x00001C00)
36 #define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00100000)
37 #define MMAP_RCM (CONFIG_SYS_MBAR + 0x00110000)
38 #define MMAP_CCM (CONFIG_SYS_MBAR + 0x00110004)
39 #define MMAP_PLL (CONFIG_SYS_MBAR + 0x00120000)
40 #define MMAP_EPORT (CONFIG_SYS_MBAR + 0x00130000)
41 #define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00140000)
42 #define MMAP_PIT0 (CONFIG_SYS_MBAR + 0x00150000)
43 #define MMAP_PIT1 (CONFIG_SYS_MBAR + 0x00160000)
44 #define MMAP_PIT2 (CONFIG_SYS_MBAR + 0x00170000)
45 #define MMAP_PIT3 (CONFIG_SYS_MBAR + 0x00180000)
46 #define MMAP_MDHA (CONFIG_SYS_MBAR + 0x00190000)
47 #define MMAP_RNG (CONFIG_SYS_MBAR + 0x001A0000)
48 #define MMAP_SKHA (CONFIG_SYS_MBAR + 0x001B0000)
49 #define MMAP_USB (CONFIG_SYS_MBAR + 0x001C0000)
50 #define MMAP_PWM0 (CONFIG_SYS_MBAR + 0x001D0000)
52 #include <asm/coldfire/eport.h>
53 #include <asm/coldfire/flexbus.h>
54 #include <asm/coldfire/intctrl.h>
55 #include <asm/coldfire/mdha.h>
56 #include <asm/coldfire/pwm.h>
57 #include <asm/coldfire/qspi.h>
58 #include <asm/coldfire/rng.h>
59 #include <asm/coldfire/skha.h>
61 /* System configuration registers
63 typedef struct sys_ctrl {
91 /* SDRAM controller registers, offset: 0x040
93 typedef struct sdram_ctrl {
104 /* DMA module registers, offset 0x100
106 typedef struct dma_ctrl {
113 /* GPIO port registers
115 typedef struct gpio_ctrl {
116 /* Port Output Data Registers */
139 /* Port Data Direction Registers */
162 /* Port Pin Data/Set Registers */
185 /* Port Clear Output Data Registers */
208 /* Pin Assignment Registers */
226 /* Watchdog registers
228 typedef struct wdog_ctrl {
236 /* USB module registers
338 /* PLL module registers
340 typedef struct pll_ctrl {
350 #endif /* __IMMAP_5275__ */