1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
7 compatible = "fsl,mcf5441x";
17 compatible = "simple-bus";
21 uart0: uart@fc060000 {
22 compatible = "fsl,mcf-uart";
23 reg = <0xfc060000 0x40>;
27 uart1: uart@fc064000 {
28 compatible = "fsl,mcf-uart";
29 reg = <0xfc064000 0x40>;
33 uart2: uart@fc068000 {
34 compatible = "fsl,mcf-uart";
35 reg = <0xfc068000 0x40>;
39 uart3: uart@fc06c000 {
40 compatible = "fsl,mcf-uart";
41 reg = <0xfc06c000 0x40>;
45 dspi0: dspi@fc05c000 {
46 compatible = "fsl,mcf-dspi";
49 reg = <0xfc05c000 0x100>;
50 spi-max-frequency = <50000000>;
56 dspi1: dspi@fc03c000 {
57 compatible = "fsl,mcf-dspi";
60 reg = <0xfc03c000 0x100>;
61 spi-max-frequency = <50000000>;
67 dspi2: dspi@ec038000 {
68 compatible = "fsl,mcf-dspi";
71 reg = <0xec038000 0x100>;
72 spi-max-frequency = <50000000>;
78 dspi3: dspi@ec03c000 {
79 compatible = "fsl,mcf-dspi";
82 reg = <0xec03c00 0x100>;
83 spi-max-frequency = <50000000>;
89 fec0: ethernet@fc0d4000 {
90 compatible = "fsl,mcf-fec";
91 reg = <0xfc0d4000 0x4000>;
94 timeout-loop = <50000>;
98 fec1: ethernet@fc0d8000 {
99 compatible = "fsl,mcf-fec";
100 reg = <0xfc0d8000 0x4000>;
103 timeout-loop = <50000>;