3 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
4 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /* CPU specific interrupt routine */
27 #include <asm/immap.h>
30 int interrupt_init(void)
32 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
34 /* Make sure all interrupts are disabled */
35 setbits_be32(&intp->imrl0, 0x1);
41 #if defined(CONFIG_MCFTMR)
42 void dtimer_intr_setup(void)
44 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
46 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
47 clrbits_be32(&intp->imrl0, INTC_IPRL_INT0);
48 clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);