2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm-offsets.h>
11 #include <asm/cache.h>
17 move.w #0x2700,%sr; /* disable intrs */ \
18 subl #60,%sp; /* space for 15 regs */ \
19 moveml %d0-%d7/%a0-%a6,%sp@;
22 moveml %sp@,%d0-%d7/%a0-%a6; \
23 addl #60,%sp; /* space for 15 regs */ \
26 #if defined(CONFIG_CF_SBF)
27 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
28 CONFIG_SYS_INIT_RAM_ADDR)
29 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
30 CONFIG_SYS_INIT_RAM_ADDR)
36 * Vector table. This is used for initial platform startup.
37 * These vectors are to catch any un-intended traps.
40 #if defined(CONFIG_CF_SBF)
41 INITSP: .long 0 /* Initial SP */
42 INITPC: .long ASM_DRAMINIT /* Initial PC */
44 INITSP: .long 0 /* Initial SP */
45 INITPC: .long _START /* Initial PC */
49 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
50 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
54 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
57 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
59 #if !defined(CONFIG_CF_SBF)
62 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 #if defined(CONFIG_CF_SBF)
102 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
104 .long 0x00000000 /* checksum, not yet implemented */
105 .long 0x00020000 /* image length */
106 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
109 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
110 movec %d0, %RAMBAR1 /* init Rambar */
112 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
115 /* Must disable global address */
116 move.l #0xFC008000, %a1
117 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
118 move.l #0xFC008008, %a1
119 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
120 move.l #0xFC008004, %a1
121 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
124 * Dram Initialization
127 move.l #0xFC0A4074, %a1
128 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
131 /* SDRAM Chip 0 and 1 */
132 move.l #0xFC0B8110, %a1
133 move.l #0xFC0B8114, %a2
135 /* calculate the size */
137 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
138 #ifdef CONFIG_SYS_SDRAM_BASE1
148 /* SDRAM Chip 0 and 1 */
149 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
151 #ifdef CONFIG_SYS_SDRAM_BASE1
152 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
157 /* dram cfg1 and cfg2 */
158 move.l #0xFC0B8008, %a1
159 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
161 move.l #0xFC0B800C, %a2
162 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
165 move.l #0xFC0B8000, %a1 /* Mode */
166 move.l #0xFC0B8004, %a2 /* Ctrl */
169 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
173 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
175 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
185 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
188 /* Perform two refresh cycles */
189 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
195 move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
196 and.l #0x7FFFFFFF, %d0
197 or.l #0x10000c00, %d0
202 * DSPI Initialization
203 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
210 /* Enable pins for DSPI mode - chip-selects are enabled later */
211 move.l #0xFC0A4036, %a0
216 #ifdef CONFIG_SYS_DSPI_CS0
221 #ifdef CONFIG_SYS_DSPI_CS2
222 move.l #0xFC0A4037, %a0
229 /* Configure DSPI module */
230 move.l #0xFC05C000, %a0
231 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
233 move.l #0xFC05C00C, %a0
234 move.l #0x3E000011, (%a0)
236 move.l #0xFC05C034, %a2 /* dtfr */
237 move.l #0xFC05C03B, %a3 /* drfr */
239 move.l #(ASM_SBF_IMG_HDR + 4), %a1
243 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
244 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
246 move.l #0xFC05C02C, %a1 /* dspi status */
248 /* Issue commands and address */
249 move.l #0x8004000B, %d2 /* Fast Read Cmd */
250 jsr asm_dspi_wr_status
251 jsr asm_dspi_rd_status
253 move.l #0x80040000, %d2 /* Address byte 2 */
254 jsr asm_dspi_wr_status
255 jsr asm_dspi_rd_status
257 move.l #0x80040000, %d2 /* Address byte 1 */
258 jsr asm_dspi_wr_status
259 jsr asm_dspi_rd_status
261 move.l #0x80040000, %d2 /* Address byte 0 */
262 jsr asm_dspi_wr_status
263 jsr asm_dspi_rd_status
265 move.l #0x80040000, %d2 /* Dummy Wr and Rd */
266 jsr asm_dspi_wr_status
267 jsr asm_dspi_rd_status
269 /* Transfer serial boot header to sram */
271 move.l #0x80040000, %d2
272 jsr asm_dspi_wr_status
273 jsr asm_dspi_rd_status
275 move.b %d1, (%a0) /* read, copy to dst */
277 add.l #1, %a0 /* inc dst by 1 */
278 sub.l #1, %d4 /* dec cnt by 1 */
279 bne asm_dspi_rd_loop1
281 /* Transfer u-boot from serial flash to memory */
283 move.l #0x80040000, %d2
284 jsr asm_dspi_wr_status
285 jsr asm_dspi_rd_status
287 move.b %d1, (%a4) /* read, copy to dst */
289 add.l #1, %a4 /* inc dst by 1 */
290 sub.l #1, %d5 /* dec cnt by 1 */
291 bne asm_dspi_rd_loop2
293 move.l #0x00040000, %d2 /* Terminate */
294 jsr asm_dspi_wr_status
295 jsr asm_dspi_rd_status
297 /* jump to memory and execute */
298 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
303 move.l (%a1), %d0 /* status */
304 and.l #0x0000F000, %d0
305 cmp.l #0x00003000, %d0
306 bgt asm_dspi_wr_status
312 move.l (%a1), %d0 /* status */
313 and.l #0x000000F0, %d0
316 beq asm_dspi_rd_status
320 #endif /* CONFIG_CF_SBF */
328 move.w #0x2700,%sr /* Mask off Interrupt */
330 /* Set vector base register at the beginning of the Flash */
331 #if defined(CONFIG_CF_SBF)
332 move.l #CONFIG_SYS_TEXT_BASE, %d0
335 move.l #CONFIG_SYS_FLASH_BASE, %d0
338 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
342 /* invalidate and disable cache */
343 move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
344 movec %d0, %CACR /* Invalidate cache */
349 /* initialize general use internal ram */
351 move.l #(ICACHE_STATUS), %a1 /* icache */
352 move.l #(DCACHE_STATUS), %a2 /* icache */
356 /* put relocation table address to a5 */
357 move.l #__got_start, %a5
359 /* setup stack initially on top of internal static ram */
360 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
363 * if configured, malloc_f arena will be reserved first,
364 * then (and always) gd struct space will be reserved
367 bsr board_init_f_alloc_reserve
369 /* update stack and frame-pointers */
373 /* initialize reserved area */
375 bsr board_init_f_init_reserve
377 /* run low-level CPU init code (from flash) */
381 /* run low-level board init code (from flash) */
384 /* board_init_f() does not return */
386 /******************************************************************************/
389 * void relocate_code (addr_sp, gd, addr_moni)
391 * This "function" does not return, instead it continues in RAM
392 * after relocating the monitor code.
396 * r5 = length in bytes
402 move.l 8(%a6), %sp /* set new stack pointer */
404 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
405 move.l 16(%a6), %a0 /* Save copy of Destination Address */
407 move.l #CONFIG_SYS_MONITOR_BASE, %a1
408 move.l #__init_end, %a2
411 /* copy the code to RAM */
413 move.l (%a1)+, (%a3)+
418 * We are done. Do not return, instead branch to second part of board
419 * initialization, now running from RAM.
422 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
429 * Now clear BSS segment
432 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
434 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
441 * fix got table in RAM
444 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
445 move.l %a1,%a5 /* fix got pointer register a5 */
448 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
458 /* calculate relative jump to board_init_r in ram */
460 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
462 /* set parameters for board_init_r */
463 move.l %a0,-(%sp) /* dest_addr */
464 move.l %d0,-(%sp) /* gd */
467 /******************************************************************************/
490 /******************************************************************************/
492 .globl version_string
494 .ascii U_BOOT_VERSION_STRING, "\0"