3 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 /* stuff specific for the sc520, but independent of implementation */
30 #include <asm/ic/pci.h>
31 #include <asm/ic/sc520.h>
38 { SC520_IRQ0, 0, 0x01 },
39 { SC520_IRQ1, 0, 0x02 },
40 { SC520_IRQ2, 1, 0x02 },
41 { SC520_IRQ3, 0, 0x08 },
42 { SC520_IRQ4, 0, 0x10 },
43 { SC520_IRQ5, 0, 0x20 },
44 { SC520_IRQ6, 0, 0x40 },
45 { SC520_IRQ7, 0, 0x80 },
47 { SC520_IRQ8, 1, 0x01 },
48 { SC520_IRQ9, 1, 0x02 },
49 { SC520_IRQ10, 1, 0x04 },
50 { SC520_IRQ11, 1, 0x08 },
51 { SC520_IRQ12, 1, 0x10 },
52 { SC520_IRQ13, 1, 0x20 },
53 { SC520_IRQ14, 1, 0x40 },
54 { SC520_IRQ15, 1, 0x80 }
58 /* The interrupt used for PCI INTA-INTD */
59 int sc520_pci_ints[15] = {
60 -1, -1, -1, -1, -1, -1, -1, -1,
61 -1, -1, -1, -1, -1, -1, -1
64 /* utility function to configure a pci interrupt */
65 int pci_sc520_set_irq(int pci_pin, int irq)
72 printf("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq);
74 if (irq < 0 || irq > 15) {
75 return -1; /* illegal irq */
78 if (pci_pin < 0 || pci_pin > 15) {
79 return -1; /* illegal pci int pin */
82 /* first disable any non-pci interrupt source that use
85 /* PCI interrupt mapping (A through D)*/
86 for (i=0; i<=3 ;i++) {
87 if (readb(&sc520_mmcr->pci_int_map[i]) == sc520_irq[irq].priority)
88 writeb(SC520_IRQ_DISABLED, &sc520_mmcr->pci_int_map[i]);
91 /* GP IRQ interrupt mapping */
92 for (i=0; i<=10 ;i++) {
93 if (readb(&sc520_mmcr->gp_int_map[i]) == sc520_irq[irq].priority)
94 writeb(SC520_IRQ_DISABLED, &sc520_mmcr->gp_int_map[i]);
97 /* Set the trigger to level */
98 tmpb = readb(&sc520_mmcr->pic_mode[sc520_irq[irq].level_reg]);
99 tmpb |= sc520_irq[irq].level_bit;
100 writeb(tmpb, &sc520_mmcr->pic_mode[sc520_irq[irq].level_reg]);
105 /* route the interrupt */
106 writeb(sc520_irq[irq].priority, &sc520_mmcr->pci_int_map[pci_pin]);
108 /* GPIRQ0-GPIRQ10 used for additional PCI INTS */
109 writeb(sc520_irq[irq].priority, &sc520_mmcr->gp_int_map[pci_pin - 4]);
111 /* also set the polarity in this case */
112 tmpw = readw(&sc520_mmcr->intpinpol);
113 tmpw |= (1 << (pci_pin-4));
114 writew(tmpw, &sc520_mmcr->intpinpol);
117 /* register the pin */
118 sc520_pci_ints[pci_pin] = irq;
124 void pci_sc520_init(struct pci_controller *hose)
126 hose->first_busno = 0;
127 hose->last_busno = 0xff;
128 hose->region_count = pci_set_regions(hose);
130 pci_setup_type1(hose,
134 pci_register_hose(hose);
136 hose->last_busno = pci_hose_scan(hose);
138 /* enable target memory acceses on host brige */
139 pci_write_config_word(0, PCI_COMMAND,
140 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);